Commit 4366e7cf authored Jul 30, 2019 by Peter Maydell

Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging



pci: bugfix

A last minute fix to cross-version migration.
Better late than never.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Tue 30 Jul 2019 17:07:42 BST
# gpg:                using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  pcie_root_port: Disable ACS on older machines
  pcie_root_port: Allow ACS to be disabled

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

parents 987a2322 c8557f1b

hw/core/machine.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -52,6 +52,7 @@ GlobalProperty hw_compat_3_1[] = {
		{ "virtio-blk-device", "discard", "false" },
		{ "virtio-blk-device", "write-zeroes", "false" },
		{ "virtio-balloon-device", "qemu-4-0-config-size", "false" },
		{ "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
		};
		const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);

hw/pci-bridge/pcie_root_port.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -111,7 +111,7 @@ static void rp_realize(PCIDevice d, Error *errp)
		pcie_aer_root_init(d);
		rp_aer_vector_update(d);

		if (rpc->acs_offset) {
		if (rpc->acs_offset && !s->disable_acs) {
		pcie_acs_init(d, rpc->acs_offset);
		}
		return;
		@@ -145,6 +145,7 @@ static void rp_exit(PCIDevice *d)
		static Property rp_props[] = {
		DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
		QEMU_PCIE_SLTCAP_PCP_BITNR, true),
		DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false),
		DEFINE_PROP_END_OF_LIST()
		};

include/hw/pci/pcie_port.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -53,6 +53,8 @@ struct PCIESlot {
		PCIExpLinkSpeed speed;
		PCIExpLinkWidth width;

		/* Disable ACS (really for a pcie_root_port) */
		bool disable_acs;
		QLIST_ENTRY(PCIESlot) next;
		};