Commit 42f53fea authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target-i386: Use cpu_exec_interrupt qom hook 



Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
Message-id: 1410626734-3804-23-git-send-email-rth@twiddle.net
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 458dd766

cpu-exec.c

+0 −64
Original line number Diff line number Diff line
@@ -426,70 +426,6 @@ int cpu_exec(CPUArchState *env) 
                    if (interrupt_request & CPU_INTERRUPT_RESET) {

                        cpu_reset(cpu);

                    }

#endif

#if defined(TARGET_I386)

#if !defined(CONFIG_USER_ONLY)

                    if (interrupt_request & CPU_INTERRUPT_POLL) {

                        cpu->interrupt_request &= ~CPU_INTERRUPT_POLL;

                        apic_poll_irq(x86_cpu->apic_state);

                    }

#endif

                    if (interrupt_request & CPU_INTERRUPT_SIPI) {

                            do_cpu_sipi(x86_cpu);

                    } else if (env->hflags2 & HF2_GIF_MASK) {

                        if ((interrupt_request & CPU_INTERRUPT_SMI) &&

                            !(env->hflags & HF_SMM_MASK)) {

                            cpu_svm_check_intercept_param(env, SVM_EXIT_SMI,

                                                          0);

                            cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;

                            do_smm_enter(x86_cpu);

                            next_tb = 0;

                        } else if ((interrupt_request & CPU_INTERRUPT_NMI) &&

                                   !(env->hflags2 & HF2_NMI_MASK)) {

                            cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;

                            env->hflags2 |= HF2_NMI_MASK;

                            do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);

                            next_tb = 0;

                        } else if (interrupt_request & CPU_INTERRUPT_MCE) {

                            cpu->interrupt_request &= ~CPU_INTERRUPT_MCE;

                            do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);

                            next_tb = 0;

                        } else if ((interrupt_request & CPU_INTERRUPT_HARD) &&

                                   (((env->hflags2 & HF2_VINTR_MASK) && 

                                     (env->hflags2 & HF2_HIF_MASK)) ||

                                    (!(env->hflags2 & HF2_VINTR_MASK) && 

                                     (env->eflags & IF_MASK && 

                                      !(env->hflags & HF_INHIBIT_IRQ_MASK))))) {

                            int intno;

                            cpu_svm_check_intercept_param(env, SVM_EXIT_INTR,

                                                          0);

                            cpu->interrupt_request &= ~(CPU_INTERRUPT_HARD |

                                                        CPU_INTERRUPT_VIRQ);

                            intno = cpu_get_pic_interrupt(env);

                            qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);

                            do_interrupt_x86_hardirq(env, intno, 1);

                            /* ensure that no TB jump will be modified as

                               the program flow was changed */

                            next_tb = 0;

#if !defined(CONFIG_USER_ONLY)

                        } else if ((interrupt_request & CPU_INTERRUPT_VIRQ) &&

                                   (env->eflags & IF_MASK) && 

                                   !(env->hflags & HF_INHIBIT_IRQ_MASK)) {

                            int intno;

                            /* FIXME: this should respect TPR */

                            cpu_svm_check_intercept_param(env, SVM_EXIT_VINTR,

                                                          0);

                            intno = ldl_phys(cpu->as,

                                             env->vm_vmcb

                                             + offsetof(struct vmcb,

                                                        control.int_vector));

                            qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);

                            do_interrupt_x86_hardirq(env, intno, 1);

                            cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;

                            next_tb = 0;

#endif

                        }

                    }

#endif

                    /* The target hook has 3 exit conditions:

                       False when the interrupt isn't processed,

target-i386/cpu-qom.h

+1 −0
Original line number Diff line number Diff line
@@ -130,6 +130,7 @@ extern struct VMStateDescription vmstate_x86_cpu; 
 * @cpu: vCPU the interrupt is to be handled by.

 */

void x86_cpu_do_interrupt(CPUState *cpu);

bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);



int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,

                             int cpuid, void *opaque);

target-i386/cpu.c

+1 −0
Original line number Diff line number Diff line
@@ -2920,6 +2920,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) 
    cc->parse_features = x86_cpu_parse_featurestr;

    cc->has_work = x86_cpu_has_work;

    cc->do_interrupt = x86_cpu_do_interrupt;

    cc->cpu_exec_interrupt = x86_cpu_exec_interrupt;

    cc->dump_state = x86_cpu_dump_state;

    cc->set_pc = x86_cpu_set_pc;

    cc->synchronize_from_tb = x86_cpu_synchronize_from_tb;

target-i386/seg_helper.c

+69 −0
Original line number Diff line number Diff line
@@ -1279,6 +1279,75 @@ void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw) 
    do_interrupt_all(x86_env_get_cpu(env), intno, 0, 0, 0, is_hw);

}



bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request)

{

    X86CPU *cpu = X86_CPU(cs);

    CPUX86State *env = &cpu->env;

    bool ret = false;



#if !defined(CONFIG_USER_ONLY)

    if (interrupt_request & CPU_INTERRUPT_POLL) {

        cs->interrupt_request &= ~CPU_INTERRUPT_POLL;

        apic_poll_irq(cpu->apic_state);

    }

#endif

    if (interrupt_request & CPU_INTERRUPT_SIPI) {

        do_cpu_sipi(cpu);

    } else if (env->hflags2 & HF2_GIF_MASK) {

        if ((interrupt_request & CPU_INTERRUPT_SMI) &&

            !(env->hflags & HF_SMM_MASK)) {

            cpu_svm_check_intercept_param(env, SVM_EXIT_SMI, 0);

            cs->interrupt_request &= ~CPU_INTERRUPT_SMI;

            do_smm_enter(cpu);

            ret = true;

        } else if ((interrupt_request & CPU_INTERRUPT_NMI) &&

                   !(env->hflags2 & HF2_NMI_MASK)) {

            cs->interrupt_request &= ~CPU_INTERRUPT_NMI;

            env->hflags2 |= HF2_NMI_MASK;

            do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);

            ret = true;

        } else if (interrupt_request & CPU_INTERRUPT_MCE) {

            cs->interrupt_request &= ~CPU_INTERRUPT_MCE;

            do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);

            ret = true;

        } else if ((interrupt_request & CPU_INTERRUPT_HARD) &&

                   (((env->hflags2 & HF2_VINTR_MASK) &&

                     (env->hflags2 & HF2_HIF_MASK)) ||

                    (!(env->hflags2 & HF2_VINTR_MASK) &&

                     (env->eflags & IF_MASK &&

                      !(env->hflags & HF_INHIBIT_IRQ_MASK))))) {

            int intno;

            cpu_svm_check_intercept_param(env, SVM_EXIT_INTR, 0);

            cs->interrupt_request &= ~(CPU_INTERRUPT_HARD |

                                       CPU_INTERRUPT_VIRQ);

            intno = cpu_get_pic_interrupt(env);

            qemu_log_mask(CPU_LOG_TB_IN_ASM,

                          "Servicing hardware INT=0x%02x\n", intno);

            do_interrupt_x86_hardirq(env, intno, 1);

            /* ensure that no TB jump will be modified as

               the program flow was changed */

            ret = true;

#if !defined(CONFIG_USER_ONLY)

        } else if ((interrupt_request & CPU_INTERRUPT_VIRQ) &&

                   (env->eflags & IF_MASK) &&

                   !(env->hflags & HF_INHIBIT_IRQ_MASK)) {

            int intno;

            /* FIXME: this should respect TPR */

            cpu_svm_check_intercept_param(env, SVM_EXIT_VINTR, 0);

            intno = ldl_phys(cs->as, env->vm_vmcb

                             + offsetof(struct vmcb, control.int_vector));

            qemu_log_mask(CPU_LOG_TB_IN_ASM,

                          "Servicing virtual hardware INT=0x%02x\n", intno);

            do_interrupt_x86_hardirq(env, intno, 1);

            cs->interrupt_request &= ~CPU_INTERRUPT_VIRQ;

            ret = true;

#endif

        }

    }



    return ret;

}



void helper_enter_level(CPUX86State *env, int level, int data32,

                        target_ulong t1)

{