Commit 3e998a77 authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'mst/tags/for_anthony' into stable-1.5 



pc,pci,virtio fixes and cleanups

This includes pc and pci cleanups, future-proofing of ROM files,
and a virtio bugfix correcting splice on virtio console.

Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Mon 26 Aug 2013 01:34:20 AM CDT using RSA key ID D28D5469
# gpg: Can't check signature: public key not found

# By Markus Armbruster (5) and others
# Via Michael S. Tsirkin
* mst/tags/for_anthony:
  virtio: virtqueue_get_avail_bytes: fix desc_pa when loop over the indirect descriptor table
  pc_piix: Kill pc_init1() memory region args
  pc: pc_compat_1_4() now can call pc_compat_1_5()
  pc: Create pc_compat_*() functions
  pc: Kill pc_init_pci_1_0()
  pc: Don't explode QEMUMachineInitArgs into local variables needlessly
  pc: Don't prematurely explode QEMUMachineInitArgs
  ppc: Don't duplicate QEMUMachineInitArgs in PPCE500Params
  ppc: Don't explode QEMUMachineInitArgs into local variables needlessly
  sun4: Don't prematurely explode QEMUMachineInitArgs
  q35: Add PCIe switch to example q35 configuration
  loader: store FW CFG ROM files in RAM
  arch_init: align MR size to target page size
  pc: cleanup 1.4 compat support

Message-id: 1377535318-30491-1-git-send-email-mst@redhat.com
parents 584950fd 1ae2757c

arch_init.c

+2 −1
Original line number Diff line number Diff line
@@ -342,7 +342,8 @@ ram_addr_t migration_bitmap_find_and_reset_dirty(MemoryRegion *mr, 
{

    unsigned long base = mr->ram_addr >> TARGET_PAGE_BITS;

    unsigned long nr = base + (start >> TARGET_PAGE_BITS);

    unsigned long size = base + (int128_get64(mr->size) >> TARGET_PAGE_BITS);

    uint64_t mr_size = TARGET_PAGE_ALIGN(memory_region_size(mr));

    unsigned long size = base + (mr_size >> TARGET_PAGE_BITS);



    unsigned long next;

docs/q35-chipset.cfg

+23 −0
Original line number Diff line number Diff line
@@ -91,6 +91,29 @@ 
  port = "4"

  chassis = "4"



##

# Example PCIe switch with two downstream ports

#

#[device "pcie-switch-upstream-port-1"]

#  driver = "x3130-upstream"

#  bus = "ich9-pcie-port-4"

#  addr = "00.0"

#

#[device "pcie-switch-downstream-port-1-1"]

#  driver = "xio3130-downstream"

#  multifunction = "on"

#  bus = "pcie-switch-upstream-port-1"

#  addr = "00.0"

#  port = "1"

#  chassis = "5"

#

#[device "pcie-switch-downstream-port-1-2"]

#  driver = "xio3130-downstream"

#  multifunction = "on"

#  bus = "pcie-switch-upstream-port-1"

#  addr = "00.1"

#  port = "1"

#  chassis = "6"



[device "ich9-ehci-1"]

  driver = "ich9-usb-ehci1"

hw/core/loader.c

+46 −3
Original line number Diff line number Diff line
@@ -54,6 +54,8 @@ 


#include <zlib.h>



bool rom_file_in_ram = true;



static int roms_loaded;



/* return the size or -1 if error */
@@ -576,6 +578,7 @@ struct Rom { 
    size_t datasize;



    uint8_t *data;

    MemoryRegion *mr;

    int isrom;

    char *fw_dir;

    char *fw_file;
@@ -605,6 +608,21 @@ static void rom_insert(Rom *rom) 
    QTAILQ_INSERT_TAIL(&roms, rom, next);

}



static void *rom_set_mr(Rom *rom, Object *owner, const char *name)

{

    void *data;



    rom->mr = g_malloc(sizeof(*rom->mr));

    memory_region_init_ram(rom->mr, owner, name, rom->datasize);

    memory_region_set_readonly(rom->mr, true);

    vmstate_register_ram_global(rom->mr);



    data = memory_region_get_ram_ptr(rom->mr);

    memcpy(data, rom->data, rom->datasize);



    return data;

}



int rom_add_file(const char *file, const char *fw_dir,

                 hwaddr addr, int32_t bootindex)

{
@@ -646,6 +664,7 @@ int rom_add_file(const char *file, const char *fw_dir, 
    if (rom->fw_file && fw_cfg) {

        const char *basename;

        char fw_file_name[56];

        void *data;



        basename = strrchr(rom->fw_file, '/');

        if (basename) {
@@ -655,8 +674,15 @@ int rom_add_file(const char *file, const char *fw_dir, 
        }

        snprintf(fw_file_name, sizeof(fw_file_name), "%s/%s", rom->fw_dir,

                 basename);

        fw_cfg_add_file(fw_cfg, fw_file_name, rom->data, rom->romsize);

        snprintf(devpath, sizeof(devpath), "/rom@%s", fw_file_name);



        if (rom_file_in_ram) {

            data = rom_set_mr(rom, OBJECT(fw_cfg), devpath);

        } else {

            data = rom->data;

        }



        fw_cfg_add_file(fw_cfg, fw_file_name, data, rom->romsize);

    } else {

        snprintf(devpath, sizeof(devpath), "/rom@" TARGET_FMT_plx, addr);

    }
@@ -731,7 +757,12 @@ static void rom_reset(void *unused) 
        if (rom->data == NULL) {

            continue;

        }

        if (rom->mr) {

            void *host = memory_region_get_ram_ptr(rom->mr);

            memcpy(host, rom->data, rom->datasize);

        } else {

            cpu_physical_memory_write_rom(rom->addr, rom->data, rom->datasize);

        }

        if (rom->isrom) {

            /* rom needs to be written only once */

            g_free(rom->data);
@@ -781,6 +812,9 @@ static Rom *find_rom(hwaddr addr) 
        if (rom->fw_file) {

            continue;

        }

        if (rom->mr) {

            continue;

        }

        if (rom->addr > addr) {

            continue;

        }
@@ -808,6 +842,9 @@ int rom_copy(uint8_t *dest, hwaddr addr, size_t size) 
        if (rom->fw_file) {

            continue;

        }

        if (rom->mr) {

            continue;

        }

        if (rom->addr + rom->romsize < addr) {

            continue;

        }
@@ -866,7 +903,13 @@ void do_info_roms(Monitor *mon, const QDict *qdict) 
    Rom *rom;



    QTAILQ_FOREACH(rom, &roms, next) {

        if (!rom->fw_file) {

        if (rom->mr) {

            monitor_printf(mon, "%s"

                           " size=0x%06zx name=\"%s\"\n",

                           rom->mr->name,

                           rom->romsize,

                           rom->name);

        } else if (!rom->fw_file) {

            monitor_printf(mon, "addr=" TARGET_FMT_plx

                           " size=0x%06zx mem=%s name=\"%s\"\n",

                           rom->addr, rom->romsize,

hw/i386/pc_piix.c

+61 −68
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include <glib.h>



#include "hw/hw.h"

#include "hw/loader.h"

#include "hw/i386/pc.h"

#include "hw/i386/apic.h"

#include "hw/pci/pci.h"
@@ -60,17 +61,12 @@ static bool has_pvpanic; 
static bool has_pci_info = true;



/* PC hardware initialisation */

static void pc_init1(MemoryRegion *system_memory,

                     MemoryRegion *system_io,

                     ram_addr_t ram_size,

                     const char *boot_device,

                     const char *kernel_filename,

                     const char *kernel_cmdline,

                     const char *initrd_filename,

                     const char *cpu_model,

static void pc_init1(QEMUMachineInitArgs *args,

                     int pci_enabled,

                     int kvmclock_enabled)

{

    MemoryRegion *system_memory = get_system_memory();

    MemoryRegion *system_io = get_system_io();

    int i;

    ram_addr_t below_4g_mem_size, above_4g_mem_size;

    PCIBus *pci_bus;
@@ -102,18 +98,18 @@ static void pc_init1(MemoryRegion *system_memory, 
    object_property_add_child(qdev_get_machine(), "icc-bridge",

                              OBJECT(icc_bridge), NULL);



    pc_cpus_init(cpu_model, icc_bridge);

    pc_cpus_init(args->cpu_model, icc_bridge);



    if (kvm_enabled() && kvmclock_enabled) {

        kvmclock_create();

    }



    if (ram_size >= 0xe0000000 ) {

        above_4g_mem_size = ram_size - 0xe0000000;

    if (args->ram_size >= 0xe0000000) {

        above_4g_mem_size = args->ram_size - 0xe0000000;

        below_4g_mem_size = 0xe0000000;

    } else {

        above_4g_mem_size = 0;

        below_4g_mem_size = ram_size;

        below_4g_mem_size = args->ram_size;

    }



    if (pci_enabled) {
@@ -132,7 +128,8 @@ static void pc_init1(MemoryRegion *system_memory, 
    /* allocate ram and load rom/bios */

    if (!xen_enabled()) {

        fw_cfg = pc_memory_init(system_memory,

                       kernel_filename, kernel_cmdline, initrd_filename,

                       args->kernel_filename, args->kernel_cmdline,

                       args->initrd_filename,

                       below_4g_mem_size, above_4g_mem_size,

                       rom_memory, &ram_memory, guest_info);

    }
@@ -148,7 +145,7 @@ static void pc_init1(MemoryRegion *system_memory, 


    if (pci_enabled) {

        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,

                              system_memory, system_io, ram_size,

                              system_memory, system_io, args->ram_size,

                              below_4g_mem_size,

                              0x100000000ULL - below_4g_mem_size,

                              above_4g_mem_size,
@@ -207,7 +204,7 @@ static void pc_init1(MemoryRegion *system_memory, 
        }

    }



    pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,

    pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_device,

                 floppy, idebus[0], idebus[1], rtc_state);



    if (pci_enabled && usb_enabled(false)) {
@@ -236,95 +233,91 @@ static void pc_init1(MemoryRegion *system_memory, 


static void pc_init_pci(QEMUMachineInitArgs *args)

{

    ram_addr_t ram_size = args->ram_size;

    const char *cpu_model = args->cpu_model;

    const char *kernel_filename = args->kernel_filename;

    const char *kernel_cmdline = args->kernel_cmdline;

    const char *initrd_filename = args->initrd_filename;

    const char *boot_device = args->boot_device;

    pc_init1(get_system_memory(),

             get_system_io(),

             ram_size, boot_device,

             kernel_filename, kernel_cmdline,

             initrd_filename, cpu_model, 1, 1);

    pc_init1(args, 1, 1);

}



static void pc_init_pci_1_6(QEMUMachineInitArgs *args)

static void pc_compat_1_6(QEMUMachineInitArgs *args)

{

    has_pci_info = false;

    pc_init_pci(args);

    rom_file_in_ram = false;

}



static void pc_init_pci_1_5(QEMUMachineInitArgs *args)

static void pc_compat_1_5(QEMUMachineInitArgs *args)

{

    pc_compat_1_6(args);

    has_pvpanic = true;

    pc_init_pci_1_6(args);

}



static void pc_init_pci_1_4(QEMUMachineInitArgs *args)

static void pc_compat_1_4(QEMUMachineInitArgs *args)

{

    pc_compat_1_5(args);

    has_pvpanic = false;

    x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);

    x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);

    has_pci_info = false;

    pc_init_pci(args);

}



static void pc_init_pci_1_3(QEMUMachineInitArgs *args)

static void pc_compat_1_3(QEMUMachineInitArgs *args)

{

    pc_compat_1_4(args);

    enable_compat_apic_id_mode();

    pc_init_pci_1_4(args);

}



/* PC machine init function for pc-1.1 to pc-1.2 */

static void pc_init_pci_1_2(QEMUMachineInitArgs *args)

/* PC compat function for pc-0.14 to pc-1.2 */

static void pc_compat_1_2(QEMUMachineInitArgs *args)

{

    pc_compat_1_3(args);

    disable_kvm_pv_eoi();

    pc_init_pci_1_3(args);

}



/* PC machine init function for pc-0.14 to pc-1.0 */

static void pc_init_pci_1_0(QEMUMachineInitArgs *args)

static void pc_init_pci_1_6(QEMUMachineInitArgs *args)

{

    pc_compat_1_6(args);

    pc_init_pci(args);

}



static void pc_init_pci_1_5(QEMUMachineInitArgs *args)

{

    pc_compat_1_5(args);

    pc_init_pci(args);

}



static void pc_init_pci_1_4(QEMUMachineInitArgs *args)

{

    pc_init_pci_1_2(args);

    pc_compat_1_4(args);

    pc_init_pci(args);

}



static void pc_init_pci_1_3(QEMUMachineInitArgs *args)

{

    pc_compat_1_3(args);

    pc_init_pci(args);

}



/* PC machine init function for pc-0.14 to pc-1.2 */

static void pc_init_pci_1_2(QEMUMachineInitArgs *args)

{

    pc_compat_1_2(args);

    pc_init_pci(args);

}



/* PC init function for pc-0.10 to pc-0.13, and reused by xenfv */

static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args)

{

    ram_addr_t ram_size = args->ram_size;

    const char *cpu_model = args->cpu_model;

    const char *kernel_filename = args->kernel_filename;

    const char *kernel_cmdline = args->kernel_cmdline;

    const char *initrd_filename = args->initrd_filename;

    const char *boot_device = args->boot_device;

    has_pci_info = false;

    disable_kvm_pv_eoi();

    enable_compat_apic_id_mode();

    pc_init1(get_system_memory(),

             get_system_io(),

             ram_size, boot_device,

             kernel_filename, kernel_cmdline,

             initrd_filename, cpu_model, 1, 0);

    pc_init1(args, 1, 0);

}



static void pc_init_isa(QEMUMachineInitArgs *args)

{

    ram_addr_t ram_size = args->ram_size;

    const char *cpu_model = args->cpu_model;

    const char *kernel_filename = args->kernel_filename;

    const char *kernel_cmdline = args->kernel_cmdline;

    const char *initrd_filename = args->initrd_filename;

    const char *boot_device = args->boot_device;

    has_pci_info = false;

    if (cpu_model == NULL)

        cpu_model = "486";

    if (!args->cpu_model) {

        args->cpu_model = "486";

    }

    disable_kvm_pv_eoi();

    enable_compat_apic_id_mode();

    pc_init1(get_system_memory(),

             get_system_io(),

             ram_size, boot_device,

             kernel_filename, kernel_cmdline,

             initrd_filename, cpu_model, 0, 1);

    pc_init1(args, 0, 1);

}



#ifdef CONFIG_XEN
@@ -516,7 +509,7 @@ static QEMUMachine pc_machine_v1_1 = { 
static QEMUMachine pc_machine_v1_0 = {

    .name = "pc-1.0",

    .desc = "Standard PC",

    .init = pc_init_pci_1_0,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_1_0,
@@ -532,7 +525,7 @@ static QEMUMachine pc_machine_v1_0 = { 
static QEMUMachine pc_machine_v0_15 = {

    .name = "pc-0.15",

    .desc = "Standard PC",

    .init = pc_init_pci_1_0,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_0_15,
@@ -565,7 +558,7 @@ static QEMUMachine pc_machine_v0_15 = { 
static QEMUMachine pc_machine_v0_14 = {

    .name = "pc-0.14",

    .desc = "Standard PC",

    .init = pc_init_pci_1_0,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_0_14,

hw/i386/pc_q35.c

+34 −19
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
 * THE SOFTWARE.

 */

#include "hw/hw.h"

#include "hw/loader.h"

#include "sysemu/arch_init.h"

#include "hw/i2c/smbus.h"

#include "hw/boards.h"
@@ -52,12 +53,6 @@ static bool has_pci_info = true; 
/* PC hardware initialisation */

static void pc_q35_init(QEMUMachineInitArgs *args)

{

    ram_addr_t ram_size = args->ram_size;

    const char *cpu_model = args->cpu_model;

    const char *kernel_filename = args->kernel_filename;

    const char *kernel_cmdline = args->kernel_cmdline;

    const char *initrd_filename = args->initrd_filename;

    const char *boot_device = args->boot_device;

    ram_addr_t below_4g_mem_size, above_4g_mem_size;

    Q35PCIHost *q35_host;

    PCIHostState *phb;
@@ -85,17 +80,17 @@ static void pc_q35_init(QEMUMachineInitArgs *args) 
    object_property_add_child(qdev_get_machine(), "icc-bridge",

                              OBJECT(icc_bridge), NULL);



    pc_cpus_init(cpu_model, icc_bridge);

    pc_cpus_init(args->cpu_model, icc_bridge);

    pc_acpi_init("q35-acpi-dsdt.aml");



    kvmclock_create();



    if (ram_size >= 0xb0000000) {

        above_4g_mem_size = ram_size - 0xb0000000;

    if (args->ram_size >= 0xb0000000) {

        above_4g_mem_size = args->ram_size - 0xb0000000;

        below_4g_mem_size = 0xb0000000;

    } else {

        above_4g_mem_size = 0;

        below_4g_mem_size = ram_size;

        below_4g_mem_size = args->ram_size;

    }



    /* pci enabled */
@@ -114,8 +109,10 @@ static void pc_q35_init(QEMUMachineInitArgs *args) 


    /* allocate ram and load rom/bios */

    if (!xen_enabled()) {

        pc_memory_init(get_system_memory(), kernel_filename, kernel_cmdline,

                       initrd_filename, below_4g_mem_size, above_4g_mem_size,

        pc_memory_init(get_system_memory(),

                       args->kernel_filename, args->kernel_cmdline,

                       args->initrd_filename,

                       below_4g_mem_size, above_4g_mem_size,

                       rom_memory, &ram_memory, guest_info);

    }
@@ -203,7 +200,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args) 
                                    0xb100),

                      8, NULL, 0);



    pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,

    pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_device,

                 floppy, idebus[0], idebus[1], rtc_state);



    /* the rest devices to which pci devfn is automatically assigned */
@@ -218,23 +215,41 @@ static void pc_q35_init(QEMUMachineInitArgs *args) 
    }

}



static void pc_q35_init_1_6(QEMUMachineInitArgs *args)

static void pc_compat_1_6(QEMUMachineInitArgs *args)

{

    has_pci_info = false;

    pc_q35_init(args);

    rom_file_in_ram = false;

}



static void pc_q35_init_1_5(QEMUMachineInitArgs *args)

static void pc_compat_1_5(QEMUMachineInitArgs *args)

{

    pc_compat_1_6(args);

    has_pvpanic = true;

    pc_q35_init_1_6(args);

}



static void pc_q35_init_1_4(QEMUMachineInitArgs *args)

static void pc_compat_1_4(QEMUMachineInitArgs *args)

{

    pc_compat_1_5(args);

    has_pvpanic = false;

    x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);

    x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);

    has_pci_info = false;

}



static void pc_q35_init_1_6(QEMUMachineInitArgs *args)

{

    pc_compat_1_6(args);

    pc_q35_init(args);

}



static void pc_q35_init_1_5(QEMUMachineInitArgs *args)

{

    pc_compat_1_5(args);

    pc_q35_init(args);

}



static void pc_q35_init_1_4(QEMUMachineInitArgs *args)

{

    pc_compat_1_4(args);

    pc_q35_init(args);

}