Commit 3e0e41ef authored by Richard Henderson's avatar Richard Henderson
Browse files

target/openrisc: Implement l.adrp 



This was added to the 1.3 spec.

Reviewed-by: default avatarStafford Horne <shorne@gmail.com>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent a465772e

target/openrisc/disas.c

+1 −0
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ INSN(sw, "%d(r%d), r%d", a->i, a->a, a->b) 
INSN(sb,     "%d(r%d), r%d", a->i, a->a, a->b)

INSN(sh,     "%d(r%d), r%d", a->i, a->a, a->b)

INSN(nop,    "")

INSN(adrp,   "r%d, %d", a->d, a->i)

INSN(addi,   "r%d, r%d, %d", a->d, a->a, a->i)

INSN(addic,  "r%d, r%d, %d", a->d, a->a, a->i)

INSN(muli,   "r%d, r%d, %d", a->d, a->a, a->i)

target/openrisc/insns.decode

+2 −0
Original line number Diff line number Diff line
@@ -102,6 +102,8 @@ l_maci 010011 ----- a:5 i:s16 
l_movhi         000110 d:5 ----0 k:16

l_macrc         000110 d:5 ----1 00000000 00000000



l_adrp          000010 d:5 i:s21



####

# Arithmetic Instructions

####

target/openrisc/translate.c

+13 −0
Original line number Diff line number Diff line
@@ -799,6 +799,19 @@ static bool trans_l_nop(DisasContext *dc, arg_l_nop *a) 
    return true;

}



static bool trans_l_adrp(DisasContext *dc, arg_l_adrp *a)

{

    if (!check_v1_3(dc)) {

        return false;

    }

    check_r0_write(dc, a->d);



    tcg_gen_movi_i32(cpu_R(dc, a->d),

                     (dc->base.pc_next & TARGET_PAGE_MASK) +

                     ((target_long)a->i << TARGET_PAGE_BITS));

    return true;

}



static bool trans_l_addi(DisasContext *dc, arg_rri *a)

{

    TCGv t0;