Commit 3d46938b authored by Paul Zimmerman's avatar Paul Zimmerman Committed by Peter Maydell
Browse files

raspi: add BCM2835 SOC MPHI emulation 



Add BCM2835 SOC MPHI (Message-based Parallel Host Interface)
emulation. It is very basic, only providing the FIQ interrupt
needed to allow the dwc-otg USB host controller driver in the
Raspbian kernel to function.

Signed-off-by: default avatarPaul Zimmerman <pauldzim@gmail.com>
Acked-by: default avatarPhilippe Mathieu-Daude <f4bug@amsat.org>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-id: 20200520235349.21215-2-pauldzim@gmail.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 7a1e049a

hw/arm/bcm2835_peripherals.c

+17 −0
Original line number Diff line number Diff line
@@ -125,6 +125,10 @@ static void bcm2835_peripherals_init(Object *obj) 
                                   OBJECT(&s->sdhci.sdbus));

    object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",

                                   OBJECT(&s->sdhost.sdbus));



    /* Mphi */

    sysbus_init_child_obj(obj, "mphi", &s->mphi, sizeof(s->mphi),

                          TYPE_BCM2835_MPHI);

}



static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
@@ -360,6 +364,19 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 


    object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");



    /* Mphi */

    object_property_set_bool(OBJECT(&s->mphi), true, "realized", &err);

    if (err) {

        error_propagate(errp, err);

        return;

    }



    memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,

                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));

    sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,

        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,

                               INTERRUPT_HOSTPORT));



    create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);

    create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);

    create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);

hw/misc/Makefile.objs

+1 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ common-obj-$(CONFIG_OMAP) += omap_l4.o 
common-obj-$(CONFIG_OMAP) += omap_sdrc.o

common-obj-$(CONFIG_OMAP) += omap_tap.o

common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o

common-obj-$(CONFIG_RASPI) += bcm2835_mphi.o

common-obj-$(CONFIG_RASPI) += bcm2835_property.o

common-obj-$(CONFIG_RASPI) += bcm2835_rng.o

common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o

hw/misc/bcm2835_mphi.c

0 → 100644
+191 −0
Original line number Diff line number Diff line 
/*

 * BCM2835 SOC MPHI emulation

 *

 * Very basic emulation, only providing the FIQ interrupt needed to

 * allow the dwc-otg USB host controller driver in the Raspbian kernel

 * to function.

 *

 * Copyright (c) 2020 Paul Zimmerman <pauldzim@gmail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

 * GNU General Public License for more details.

 */



#include "qemu/osdep.h"

#include "qapi/error.h"

#include "hw/misc/bcm2835_mphi.h"

#include "migration/vmstate.h"

#include "qemu/error-report.h"

#include "qemu/log.h"

#include "qemu/main-loop.h"



static inline void mphi_raise_irq(BCM2835MphiState *s)

{

    qemu_set_irq(s->irq, 1);

}



static inline void mphi_lower_irq(BCM2835MphiState *s)

{

    qemu_set_irq(s->irq, 0);

}



static uint64_t mphi_reg_read(void *ptr, hwaddr addr, unsigned size)

{

    BCM2835MphiState *s = ptr;

    uint32_t val = 0;



    switch (addr) {

    case 0x28:  /* outdda */

        val = s->outdda;

        break;

    case 0x2c:  /* outddb */

        val = s->outddb;

        break;

    case 0x4c:  /* ctrl */

        val = s->ctrl;

        val |= 1 << 17;

        break;

    case 0x50:  /* intstat */

        val = s->intstat;

        break;

    case 0x1f0: /* swirq_set */

        val = s->swirq;

        break;

    case 0x1f4: /* swirq_clr */

        val = s->swirq;

        break;

    default:

        qemu_log_mask(LOG_UNIMP, "read from unknown register");

        break;

    }



    return val;

}



static void mphi_reg_write(void *ptr, hwaddr addr, uint64_t val, unsigned size)

{

    BCM2835MphiState *s = ptr;

    int do_irq = 0;



    switch (addr) {

    case 0x28:  /* outdda */

        s->outdda = val;

        break;

    case 0x2c:  /* outddb */

        s->outddb = val;

        if (val & (1 << 29)) {

            do_irq = 1;

        }

        break;

    case 0x4c:  /* ctrl */

        s->ctrl = val;

        if (val & (1 << 16)) {

            do_irq = -1;

        }

        break;

    case 0x50:  /* intstat */

        s->intstat = val;

        if (val & ((1 << 16) | (1 << 29))) {

            do_irq = -1;

        }

        break;

    case 0x1f0: /* swirq_set */

        s->swirq |= val;

        do_irq = 1;

        break;

    case 0x1f4: /* swirq_clr */

        s->swirq &= ~val;

        do_irq = -1;

        break;

    default:

        qemu_log_mask(LOG_UNIMP, "write to unknown register");

        return;

    }



    if (do_irq > 0) {

        mphi_raise_irq(s);

    } else if (do_irq < 0) {

        mphi_lower_irq(s);

    }

}



static const MemoryRegionOps mphi_mmio_ops = {

    .read = mphi_reg_read,

    .write = mphi_reg_write,

    .impl.min_access_size = 4,

    .impl.max_access_size = 4,

    .endianness = DEVICE_LITTLE_ENDIAN,

};



static void mphi_reset(DeviceState *dev)

{

    BCM2835MphiState *s = BCM2835_MPHI(dev);



    s->outdda = 0;

    s->outddb = 0;

    s->ctrl = 0;

    s->intstat = 0;

    s->swirq = 0;

}



static void mphi_realize(DeviceState *dev, Error **errp)

{

    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);

    BCM2835MphiState *s = BCM2835_MPHI(dev);



    sysbus_init_irq(sbd, &s->irq);

}



static void mphi_init(Object *obj)

{

    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);

    BCM2835MphiState *s = BCM2835_MPHI(obj);



    memory_region_init_io(&s->iomem, obj, &mphi_mmio_ops, s, "mphi", MPHI_MMIO_SIZE);

    sysbus_init_mmio(sbd, &s->iomem);

}



const VMStateDescription vmstate_mphi_state = {

    .name = "mphi",

    .version_id = 1,

    .minimum_version_id = 1,

    .fields = (VMStateField[]) {

        VMSTATE_UINT32(outdda, BCM2835MphiState),

        VMSTATE_UINT32(outddb, BCM2835MphiState),

        VMSTATE_UINT32(ctrl, BCM2835MphiState),

        VMSTATE_UINT32(intstat, BCM2835MphiState),

        VMSTATE_UINT32(swirq, BCM2835MphiState),

        VMSTATE_END_OF_LIST()

    }

};



static void mphi_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);



    dc->realize = mphi_realize;

    dc->reset = mphi_reset;

    dc->vmsd = &vmstate_mphi_state;

}



static const TypeInfo bcm2835_mphi_type_info = {

    .name          = TYPE_BCM2835_MPHI,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(BCM2835MphiState),

    .instance_init = mphi_init,

    .class_init    = mphi_class_init,

};



static void bcm2835_mphi_register_types(void)

{

    type_register_static(&bcm2835_mphi_type_info);

}



type_init(bcm2835_mphi_register_types)

include/hw/arm/bcm2835_peripherals.h

+2 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#include "hw/misc/bcm2835_property.h"

#include "hw/misc/bcm2835_rng.h"

#include "hw/misc/bcm2835_mbox.h"

#include "hw/misc/bcm2835_mphi.h"

#include "hw/misc/bcm2835_thermal.h"

#include "hw/sd/sdhci.h"

#include "hw/sd/bcm2835_sdhost.h"
@@ -42,6 +43,7 @@ typedef struct BCM2835PeripheralState { 
    qemu_irq irq, fiq;



    BCM2835SystemTimerState systmr;

    BCM2835MphiState mphi;

    UnimplementedDeviceState armtmr;

    UnimplementedDeviceState cprman;

    UnimplementedDeviceState a2w;

include/hw/misc/bcm2835_mphi.h

0 → 100644
+44 −0
Original line number Diff line number Diff line 
/*

 * BCM2835 SOC MPHI state definitions

 *

 * Copyright (c) 2020 Paul Zimmerman <pauldzim@gmail.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

 * GNU General Public License for more details.

 */



#ifndef HW_MISC_BCM2835_MPHI_H

#define HW_MISC_BCM2835_MPHI_H



#include "hw/irq.h"

#include "hw/sysbus.h"



#define MPHI_MMIO_SIZE      0x1000



typedef struct BCM2835MphiState BCM2835MphiState;



struct BCM2835MphiState {

    SysBusDevice parent_obj;

    qemu_irq irq;

    MemoryRegion iomem;



    uint32_t outdda;

    uint32_t outddb;

    uint32_t ctrl;

    uint32_t intstat;

    uint32_t swirq;

};



#define TYPE_BCM2835_MPHI   "bcm2835-mphi"



#define BCM2835_MPHI(obj) \

    OBJECT_CHECK(BCM2835MphiState, (obj), TYPE_BCM2835_MPHI)



#endif