Loading hw/dma/sun4m_iommu.c +0 −33 Original line number Diff line number Diff line Loading @@ -321,39 +321,6 @@ static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu, return ret; } void sparc_iommu_memory_rw(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write) { int l; uint32_t flags; hwaddr page, phys_addr; while (len > 0) { page = addr & IOMMU_PAGE_MASK; l = (page + IOMMU_PAGE_SIZE) - addr; if (l > len) l = len; flags = iommu_page_get_flags(opaque, page); if (!(flags & IOPTE_VALID)) { iommu_bad_addr(opaque, page, is_write); return; } phys_addr = iommu_translate_pa(addr, flags); if (is_write) { if (!(flags & IOPTE_WRITE)) { iommu_bad_addr(opaque, page, is_write); return; } cpu_physical_memory_write(phys_addr, buf, l); } else { cpu_physical_memory_read(phys_addr, buf, l); } len -= l; buf += l; addr += l; } } static const VMStateDescription vmstate_iommu = { .name ="iommu", .version_id = 2, Loading include/hw/sparc/sun4m.h +0 −16 Original line number Diff line number Diff line Loading @@ -29,22 +29,6 @@ typedef struct IOMMUState { uint32_t version; } IOMMUState; void sparc_iommu_memory_rw(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write); static inline void sparc_iommu_memory_read(void *opaque, hwaddr addr, uint8_t *buf, int len) { sparc_iommu_memory_rw(opaque, addr, buf, len, 0); } static inline void sparc_iommu_memory_write(void *opaque, hwaddr addr, uint8_t *buf, int len) { sparc_iommu_memory_rw(opaque, addr, buf, len, 1); } /* sparc32_dma.c */ #include "hw/sparc/sparc32_dma.h" Loading Loading
hw/dma/sun4m_iommu.c +0 −33 Original line number Diff line number Diff line Loading @@ -321,39 +321,6 @@ static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu, return ret; } void sparc_iommu_memory_rw(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write) { int l; uint32_t flags; hwaddr page, phys_addr; while (len > 0) { page = addr & IOMMU_PAGE_MASK; l = (page + IOMMU_PAGE_SIZE) - addr; if (l > len) l = len; flags = iommu_page_get_flags(opaque, page); if (!(flags & IOPTE_VALID)) { iommu_bad_addr(opaque, page, is_write); return; } phys_addr = iommu_translate_pa(addr, flags); if (is_write) { if (!(flags & IOPTE_WRITE)) { iommu_bad_addr(opaque, page, is_write); return; } cpu_physical_memory_write(phys_addr, buf, l); } else { cpu_physical_memory_read(phys_addr, buf, l); } len -= l; buf += l; addr += l; } } static const VMStateDescription vmstate_iommu = { .name ="iommu", .version_id = 2, Loading
include/hw/sparc/sun4m.h +0 −16 Original line number Diff line number Diff line Loading @@ -29,22 +29,6 @@ typedef struct IOMMUState { uint32_t version; } IOMMUState; void sparc_iommu_memory_rw(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write); static inline void sparc_iommu_memory_read(void *opaque, hwaddr addr, uint8_t *buf, int len) { sparc_iommu_memory_rw(opaque, addr, buf, len, 0); } static inline void sparc_iommu_memory_write(void *opaque, hwaddr addr, uint8_t *buf, int len) { sparc_iommu_memory_rw(opaque, addr, buf, len, 1); } /* sparc32_dma.c */ #include "hw/sparc/sparc32_dma.h" Loading