Commit 3b40f0e5 authored by Aviv Ben-David's avatar Aviv Ben-David Committed by Michael S. Tsirkin
Browse files

intel_iommu: add "caching-mode" option 



This capability asks the guest to invalidate cache before each map operation.
We can use this invalidation to trap map operations in the hypervisor.

Signed-off-by: default avatarAviv Ben-David <bd.aviv@gmail.com>
[peterx: using "caching-mode" instead of "cache-mode" to align with spec]
[peterx: re-write the subject to make it short and clear]
Reviewed-by: default avatarJason Wang <jasowang@redhat.com>
Signed-off-by: default avatarPeter Xu <peterx@redhat.com>
Signed-off-by: default avatarAviv Ben-David <bd.aviv@gmail.com>
Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
parent dfbd90e5

hw/i386/intel_iommu.c

+5 −0
Original line number Diff line number Diff line
@@ -2115,6 +2115,7 @@ static Property vtd_properties[] = { 
    DEFINE_PROP_ON_OFF_AUTO("eim", IntelIOMMUState, intr_eim,

                            ON_OFF_AUTO_AUTO),

    DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false),

    DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE),

    DEFINE_PROP_END_OF_LIST(),

};
@@ -2496,6 +2497,10 @@ static void vtd_init(IntelIOMMUState *s) 
        s->ecap |= VTD_ECAP_DT;

    }



    if (s->caching_mode) {

        s->cap |= VTD_CAP_CM;

    }



    vtd_reset_context_cache(s);

    vtd_reset_iotlb(s);

hw/i386/intel_iommu_internal.h

+1 −0
Original line number Diff line number Diff line
@@ -202,6 +202,7 @@ 
#define VTD_CAP_MAMV                (VTD_MAMV << 48)

#define VTD_CAP_PSI                 (1ULL << 39)

#define VTD_CAP_SLLPS               ((1ULL << 34) | (1ULL << 35))

#define VTD_CAP_CM                  (1ULL << 7)



/* Supported Adjusted Guest Address Widths */

#define VTD_CAP_SAGAW_SHIFT         8

include/hw/i386/intel_iommu.h

+2 −0
Original line number Diff line number Diff line
@@ -257,6 +257,8 @@ struct IntelIOMMUState { 
    uint8_t womask[DMAR_REG_SIZE];  /* WO (write only - read returns 0) */

    uint32_t version;



    bool caching_mode;          /* RO - is cap CM enabled? */



    dma_addr_t root;                /* Current root table pointer */

    bool root_extended;             /* Type of root table (extended or not) */

    bool dmar_enabled;              /* Set if DMA remapping is enabled */