Commit 3ae0343d authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé
Browse files

hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit 



Parallel NOR flashes are limited to 16-bit bus accesses.
Remove the 32-bit dead code.

Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-29-philmd@redhat.com>
Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
parent b0349937

hw/block/pflash_cfi02.c

+1 −4
Original line number Diff line number Diff line
@@ -317,8 +317,6 @@ static uint64_t pflash_read(void *opaque, hwaddr offset, unsigned int width) 
    boff = offset & 0xFF;

    if (pfl->width == 2) {

        boff = boff >> 1;

    } else if (pfl->width == 4) {

        boff = boff >> 2;

    }

    switch (pfl->cmd) {

    default:
@@ -449,8 +447,6 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, 
    boff = offset;

    if (pfl->width == 2) {

        boff = boff >> 1;

    } else if (pfl->width == 4) {

        boff = boff >> 2;

    }

    /* Only the least-significant 11 bits are used in most cases. */

    boff &= 0x7FF;
@@ -710,6 +706,7 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value, 
static const MemoryRegionOps pflash_cfi02_ops = {

    .read = pflash_read,

    .write = pflash_write,

    .impl.max_access_size = 2,

    .valid.min_access_size = 1,

    .valid.max_access_size = 4,

    .endianness = DEVICE_NATIVE_ENDIAN,