Commit 371e94ba authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé Committed by Michael S. Tsirkin
Browse files

hw/pci-host/xilinx: QOM'ify the AXI-PCIe host bridge 



Signed-off-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
Reviewed-by: default avatarMarcel Apfelbaum <marcel@redhat.com>
parent 05607921

hw/pci-host/xilinx-pcie.c

+10 −11
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
 */



#include "qemu/osdep.h"

#include "qapi/error.h"

#include "hw/pci/pci_bridge.h"

#include "hw/pci-host/xilinx-pcie.h"
@@ -267,24 +268,22 @@ static void xilinx_pcie_root_config_write(PCIDevice *d, uint32_t address, 
    }

}



static int xilinx_pcie_root_init(PCIDevice *dev)

static void xilinx_pcie_root_realize(PCIDevice *pci_dev, Error **errp)

{

    BusState *bus = qdev_get_parent_bus(DEVICE(dev));

    BusState *bus = qdev_get_parent_bus(DEVICE(pci_dev));

    XilinxPCIEHost *s = XILINX_PCIE_HOST(bus->parent);



    pci_set_word(dev->config + PCI_COMMAND,

    pci_set_word(pci_dev->config + PCI_COMMAND,

                 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);

    pci_set_word(dev->config + PCI_MEMORY_BASE, s->mmio_base >> 16);

    pci_set_word(dev->config + PCI_MEMORY_LIMIT,

    pci_set_word(pci_dev->config + PCI_MEMORY_BASE, s->mmio_base >> 16);

    pci_set_word(pci_dev->config + PCI_MEMORY_LIMIT,

                 ((s->mmio_base + s->mmio_size - 1) >> 16) & 0xfff0);



    pci_bridge_initfn(dev, TYPE_PCI_BUS);

    pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);



    if (pcie_endpoint_cap_v1_init(dev, 0x80) < 0) {

        hw_error("Failed to initialize PCIe capability");

    if (pcie_endpoint_cap_v1_init(pci_dev, 0x80) < 0) {

        error_setg(errp, "Failed to initialize PCIe capability");

    }



    return 0;

}



static void xilinx_pcie_root_class_init(ObjectClass *klass, void *data)
@@ -300,7 +299,7 @@ static void xilinx_pcie_root_class_init(ObjectClass *klass, void *data) 
    k->class_id = PCI_CLASS_BRIDGE_HOST;

    k->is_express = true;

    k->is_bridge = true;

    k->init = xilinx_pcie_root_init;

    k->realize = xilinx_pcie_root_realize;

    k->exit = pci_bridge_exitfn;

    dc->reset = pci_bridge_reset;

    k->config_read = xilinx_pcie_root_config_read;