Commit 36a9abd9 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160211' into staging 



target-arm queue:
 * fix some missing traps for EL3 support
 * enable EL3 on Cortex-A53 and Cortex-A57
 * fix syndrome IL bit for Thumb coprocessor, VFP and Neon traps
 * fix mishandling of architectural watchpoints
 * avoid buffer overflow in sd.c
 * fix max-cpus check in virt board
 * implement 'get board revision' query for BCM2835

# gpg: Signature made Thu 11 Feb 2016 11:23:47 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"

* remotes/pmaydell/tags/pull-target-arm-20160211:
  bcm2835_property: implement "get board revision" query
  hw/arm/virt: fix max-cpus check
  sd: limit 'req.cmd' while using as an array index
  target-arm: Implement checking of fired watchpoint
  cpu: Add callback to check architectural watchpoint match
  target-arm: Fix IL bit reported for Thumb VFP and Neon traps
  target-arm: Fix IL bit reported for Thumb coprocessor traps
  target-arm: Correct misleading 'is_thumb' syn_* parameter names
  target-arm: Enable EL3 for Cortex-A53 and Cortex-A57
  target-arm: Implement NSACR trapping behaviour
  target-arm: Add isread parameter to CPAccessFns
  target-arm: Update arm_generate_debug_exceptions() to handle EL2/EL3
  target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR
  target-arm: Implement MDCR_EL3 and SDCR
  target-arm: Fix typo in comment in arm_is_secure_below_el3()

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 88c73d16 f0afa731

exec.c

+6 −0
Original line number Diff line number Diff line
@@ -2070,6 +2070,7 @@ static const MemoryRegionOps notdirty_mem_ops = { 
static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)

{

    CPUState *cpu = current_cpu;

    CPUClass *cc = CPU_GET_CLASS(cpu);

    CPUArchState *env = cpu->env_ptr;

    target_ulong pc, cs_base;

    target_ulong vaddr;
@@ -2095,6 +2096,11 @@ static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags) 
            wp->hitaddr = vaddr;

            wp->hitattrs = attrs;

            if (!cpu->watchpoint_hit) {

                if (wp->flags & BP_CPU &&

                    !cc->debug_check_watchpoint(cpu, wp)) {

                    wp->flags &= ~BP_WATCHPOINT_HIT;

                    continue;

                }

                cpu->watchpoint_hit = wp;

                tb_check_watchpoint(cpu);

                if (wp->flags & BP_STOP_BEFORE_ACCESS) {

hw/arm/bcm2835_peripherals.c

+2 −0
Original line number Diff line number Diff line
@@ -58,6 +58,8 @@ static void bcm2835_peripherals_init(Object *obj) 
    /* Property channel */

    object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY);

    object_property_add_child(obj, "property", OBJECT(&s->property), NULL);

    object_property_add_alias(obj, "board-rev", OBJECT(&s->property),

                              "board-rev", &error_abort);

    qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default());



    object_property_add_const_link(OBJECT(&s->property), "dma-mr",

hw/arm/bcm2836.c

+2 −0
Original line number Diff line number Diff line
@@ -39,6 +39,8 @@ static void bcm2836_init(Object *obj) 
                      TYPE_BCM2835_PERIPHERALS);

    object_property_add_child(obj, "peripherals", OBJECT(&s->peripherals),

                              &error_abort);

    object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),

                              "board-rev", &error_abort);

    qdev_set_parent_bus(DEVICE(&s->peripherals), sysbus_get_default());

}

hw/arm/raspi.c

+2 −0
Original line number Diff line number Diff line
@@ -128,6 +128,8 @@ static void raspi2_init(MachineState *machine) 
                                   &error_abort);

    object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus",

                            &error_abort);

    object_property_set_int(OBJECT(&s->soc), 0xa21041, "board-rev",

                            &error_abort);

    object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort);



    setup_boot(machine, 2, machine->ram_size);

hw/arm/virt.c

+5 −5
Original line number Diff line number Diff line
@@ -1013,7 +1013,7 @@ static void machvirt_init(MachineState *machine) 
    MemoryRegion *sysmem = get_system_memory();

    MemoryRegion *secure_sysmem = NULL;

    int gic_version = vms->gic_version;

    int n, max_cpus;

    int n, virt_max_cpus;

    MemoryRegion *ram = g_new(MemoryRegion, 1);

    const char *cpu_model = machine->cpu_model;

    VirtBoardInfo *vbi;
@@ -1051,15 +1051,15 @@ static void machvirt_init(MachineState *machine) 
     * many redistributors we can fit into the memory map.

     */

    if (gic_version == 3) {

        max_cpus = vbi->memmap[VIRT_GIC_REDIST].size / 0x20000;

        virt_max_cpus = vbi->memmap[VIRT_GIC_REDIST].size / 0x20000;

    } else {

        max_cpus = GIC_NCPU;

        virt_max_cpus = GIC_NCPU;

    }



    if (smp_cpus > max_cpus) {

    if (max_cpus > virt_max_cpus) {

        error_report("Number of SMP CPUs requested (%d) exceeds max CPUs "

                     "supported by machine 'mach-virt' (%d)",

                     smp_cpus, max_cpus);

                     max_cpus, virt_max_cpus);

        exit(1);

    }