Commit 339aaf5b authored by Antony Pavlov's avatar Antony Pavlov Committed by Peter Maydell
Browse files

qemu-log: add log category for MMU info 



Running barebox on qemu-system-mips* with '-d unimp' overloads
stderr by very very many mips_cpu_handle_mmu_fault() messages:

  mips_cpu_handle_mmu_fault address=b80003fd ret 0 physical 00000000180003fd prot 3
  mips_cpu_handle_mmu_fault address=a0800884 ret 0 physical 0000000000800884 prot 3
  mips_cpu_handle_mmu_fault pc a080cd80 ad b80003fd rw 0 mmu_idx 0

So it's very difficult to find LOG_UNIMP message.

The mips_cpu_handle_mmu_fault() messages appear on enabling ANY
logging! It's not very handy.

Adding separate log category for *_cpu_handle_mmu_fault()
logging fixes the problem.

Signed-off-by: default avatarAntony Pavlov <antonynpavlov@gmail.com>
Acked-by: default avatarAlexander Graf <agraf@suse.de>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Message-id: 1418489298-1184-1-git-send-email-antonynpavlov@gmail.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent d86fb034

cputlb.c

+2 −1
Original line number Diff line number Diff line
@@ -270,7 +270,8 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr, 
    assert(sz >= TARGET_PAGE_SIZE);



#if defined(DEBUG_TLB)

    printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx

    qemu_log_mask(CPU_LOG_MMU,

           "tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx

           " prot=%x idx=%d\n",

           vaddr, paddr, prot, mmu_idx);

#endif

include/qemu/log.h

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ static inline bool qemu_log_enabled(void) 
#define CPU_LOG_RESET      (1 << 9)

#define LOG_UNIMP          (1 << 10)

#define LOG_GUEST_ERROR    (1 << 11)

#define CPU_LOG_MMU        (1 << 12)



/* Returns true if a bit is set in the current loglevel mask

 */

qemu-log.c

+2 −0
Original line number Diff line number Diff line
@@ -106,6 +106,8 @@ const QEMULogItem qemu_log_items[] = { 
      "show trace before each executed TB (lots of logs)" },

    { CPU_LOG_TB_CPU, "cpu",

      "show CPU state before block translation" },

    { CPU_LOG_MMU, "mmu",

      "log MMU-related activities" },

    { CPU_LOG_PCALL, "pcall",

      "x86 only: show protected mode far calls/returns/exceptions" },

    { CPU_LOG_RESET, "cpu_reset",

target-cris/helper.c

+6 −5
Original line number Diff line number Diff line
@@ -84,8 +84,8 @@ int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, 
    int r = -1;

    target_ulong phy;



    D(printf("%s addr=%" VADDR_PRIx " pc=%x rw=%x\n",

             __func__, address, env->pc, rw));

    qemu_log_mask(CPU_LOG_MMU, "%s addr=%" VADDR_PRIx " pc=%x rw=%x\n",

            __func__, address, env->pc, rw);

    miss = cris_mmu_translate(&res, env, address & TARGET_PAGE_MASK,

                              rw, mmu_idx, 0);

    if (miss) {
@@ -112,9 +112,10 @@ int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, 
        r = 0;

    }

    if (r > 0) {

        D_LOG("%s returns %d irqreq=%x addr=%" VADDR_PRIx " phy=%x vec=%x"

              " pc=%x\n", __func__, r, cs->interrupt_request, address, res.phy,

              res.bf_vec, env->pc);

        qemu_log_mask(CPU_LOG_MMU,

                "%s returns %d irqreq=%x addr=%" VADDR_PRIx " phy=%x vec=%x"

                " pc=%x\n", __func__, r, cs->interrupt_request, address,

                res.phy, res.bf_vec, env->pc);

    }

    return r;

}

target-i386/helper.c

+4 −11
Original line number Diff line number Diff line
@@ -25,8 +25,6 @@ 
#include "monitor/monitor.h"

#endif



//#define DEBUG_MMU



static void cpu_x86_version(CPUX86State *env, int *family, int *model)

{

    int cpuver = env->cpuid_version;
@@ -388,9 +386,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state) 
    if (a20_state != ((env->a20_mask >> 20) & 1)) {

        CPUState *cs = CPU(cpu);



#if defined(DEBUG_MMU)

        printf("A20 update: a20=%d\n", a20_state);

#endif

        qemu_log_mask(CPU_LOG_MMU, "A20 update: a20=%d\n", a20_state);

        /* if the cpu is currently executing code, we must unlink it and

           all the potentially executing TB */

        cpu_interrupt(cs, CPU_INTERRUPT_EXITTB);
@@ -407,9 +403,7 @@ void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0) 
    X86CPU *cpu = x86_env_get_cpu(env);

    int pe_state;



#if defined(DEBUG_MMU)

    printf("CR0 update: CR0=0x%08x\n", new_cr0);

#endif

    qemu_log_mask(CPU_LOG_MMU, "CR0 update: CR0=0x%08x\n", new_cr0);

    if ((new_cr0 & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK)) !=

        (env->cr[0] & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK))) {

        tlb_flush(CPU(cpu), 1);
@@ -452,9 +446,8 @@ void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3) 


    env->cr[3] = new_cr3;

    if (env->cr[0] & CR0_PG_MASK) {

#if defined(DEBUG_MMU)

        printf("CR3 update: CR3=" TARGET_FMT_lx "\n", new_cr3);

#endif

        qemu_log_mask(CPU_LOG_MMU,

                        "CR3 update: CR3=" TARGET_FMT_lx "\n", new_cr3);

        tlb_flush(CPU(cpu), 0);

    }

}