Commit 338404d0 authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160719' into staging 



target-arm queue:
 * fix two minor Coverity complaints

# gpg: Signature made Tue 19 Jul 2016 18:02:34 BST
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20160719:
  arm_gicv3: Add assert()s to tell Coverity that offsets are aligned
  target-arm: Fix unreachable code in gicv3_class_name()

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 1ecfb24d acd82796

hw/intc/arm_gicv3_redist.c

+4 −0
Original line number Diff line number Diff line
@@ -420,6 +420,8 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offset, uint64_t *data, 
    MemTxResult r;

    int cpuidx;



    assert((offset & (size - 1)) == 0);



    /* This region covers all the redistributor pages; there are

     * (for GICv3) two 64K pages per CPU. At the moment they are

     * all contiguous (ie in this one region), though we might later
@@ -468,6 +470,8 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr offset, uint64_t data, 
    MemTxResult r;

    int cpuidx;



    assert((offset & (size - 1)) == 0);



    /* This region covers all the redistributor pages; there are

     * (for GICv3) two 64K pages per CPU. At the moment they are

     * all contiguous (ie in this one region), though we might later

target-arm/machine.c

+1 −2
Original line number Diff line number Diff line
@@ -340,10 +340,9 @@ const char *gicv3_class_name(void) 
#else

        error_report("KVM GICv3 acceleration is not supported on this "

                     "platform");

        exit(1);

#endif

    } else {

        return "arm-gicv3";

    }



    exit(1);

}