Loading hw/mc146818rtc.c +32 −11 Original line number Diff line number Diff line Loading @@ -63,10 +63,11 @@ #define REG_C_AF 0x20 struct RTCState { ISADevice dev; uint8_t cmos_data[128]; uint8_t cmos_index; struct tm current_tm; int base_year; int32_t base_year; qemu_irq irq; qemu_irq sqw_irq; int it_shift; Loading Loading @@ -589,20 +590,19 @@ static void rtc_reset(void *opaque) #endif } RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year) static int rtc_initfn(ISADevice *dev) { RTCState *s; RTCState *s = DO_UPCAST(RTCState, dev, dev); int base = 0x70; int isairq = 8; s = qemu_mallocz(sizeof(RTCState)); isa_init_irq(dev, &s->irq, isairq); s->irq = irq; s->sqw_irq = sqw_irq; s->cmos_data[RTC_REG_A] = 0x26; s->cmos_data[RTC_REG_B] = 0x02; s->cmos_data[RTC_REG_C] = 0x00; s->cmos_data[RTC_REG_D] = 0x80; s->base_year = base_year; rtc_set_date_from_host(s); s->periodic_timer = qemu_new_timer(vm_clock, Loading @@ -628,14 +628,35 @@ RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year) register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s); #endif qemu_register_reset(rtc_reset, s); return 0; } return s; RTCState *rtc_init(int base_year) { ISADevice *dev; dev = isa_create("mc146818rtc"); qdev_prop_set_int32(&dev->qdev, "base_year", base_year); qdev_init(&dev->qdev); return DO_UPCAST(RTCState, dev, dev); } RTCState *rtc_init(int base, qemu_irq irq, int base_year) static ISADeviceInfo mc146818rtc_info = { .qdev.name = "mc146818rtc", .qdev.size = sizeof(RTCState), .qdev.no_user = 1, .init = rtc_initfn, .qdev.props = (Property[]) { DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980), DEFINE_PROP_END_OF_LIST(), } }; static void mc146818rtc_register(void) { return rtc_init_sqw(base, irq, NULL, base_year); isa_qdev_register(&mc146818rtc_info); } device_init(mc146818rtc_register) /* Memory mapped interface */ static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr) Loading hw/mips_jazz.c +1 −1 Original line number Diff line number Diff line Loading @@ -241,7 +241,7 @@ void mips_jazz_init (ram_addr_t ram_size, fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds); /* Real time clock */ rtc_init(0x70, i8259[8], 1980); rtc_init(1980); s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env); cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc); Loading hw/mips_malta.c +1 −1 Original line number Diff line number Diff line Loading @@ -923,7 +923,7 @@ void mips_malta_init (ram_addr_t ram_size, /* Super I/O */ isa_dev = isa_create_simple("i8042"); rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); rtc_state = rtc_init(2000); serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]); serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]); if (parallel_hds[0]) Loading hw/mips_r4k.c +1 −1 Original line number Diff line number Diff line Loading @@ -244,7 +244,7 @@ void mips_r4k_init (ram_addr_t ram_size, isa_bus_new(NULL); isa_bus_irqs(i8259); rtc_state = rtc_init(0x70, i8259[8], 2000); rtc_state = rtc_init(2000); /* Register 64 KB of ISA IO space at 0x14000000 */ isa_mmio_init(0x14000000, 0x00010000); Loading hw/pc.c +1 −1 Original line number Diff line number Diff line Loading @@ -1313,7 +1313,7 @@ static void pc_init1(ram_addr_t ram_size, } } rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); rtc_state = rtc_init(2000); qemu_register_boot_set(pc_boot_set, rtc_state); Loading Loading
hw/mc146818rtc.c +32 −11 Original line number Diff line number Diff line Loading @@ -63,10 +63,11 @@ #define REG_C_AF 0x20 struct RTCState { ISADevice dev; uint8_t cmos_data[128]; uint8_t cmos_index; struct tm current_tm; int base_year; int32_t base_year; qemu_irq irq; qemu_irq sqw_irq; int it_shift; Loading Loading @@ -589,20 +590,19 @@ static void rtc_reset(void *opaque) #endif } RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year) static int rtc_initfn(ISADevice *dev) { RTCState *s; RTCState *s = DO_UPCAST(RTCState, dev, dev); int base = 0x70; int isairq = 8; s = qemu_mallocz(sizeof(RTCState)); isa_init_irq(dev, &s->irq, isairq); s->irq = irq; s->sqw_irq = sqw_irq; s->cmos_data[RTC_REG_A] = 0x26; s->cmos_data[RTC_REG_B] = 0x02; s->cmos_data[RTC_REG_C] = 0x00; s->cmos_data[RTC_REG_D] = 0x80; s->base_year = base_year; rtc_set_date_from_host(s); s->periodic_timer = qemu_new_timer(vm_clock, Loading @@ -628,14 +628,35 @@ RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year) register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s); #endif qemu_register_reset(rtc_reset, s); return 0; } return s; RTCState *rtc_init(int base_year) { ISADevice *dev; dev = isa_create("mc146818rtc"); qdev_prop_set_int32(&dev->qdev, "base_year", base_year); qdev_init(&dev->qdev); return DO_UPCAST(RTCState, dev, dev); } RTCState *rtc_init(int base, qemu_irq irq, int base_year) static ISADeviceInfo mc146818rtc_info = { .qdev.name = "mc146818rtc", .qdev.size = sizeof(RTCState), .qdev.no_user = 1, .init = rtc_initfn, .qdev.props = (Property[]) { DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980), DEFINE_PROP_END_OF_LIST(), } }; static void mc146818rtc_register(void) { return rtc_init_sqw(base, irq, NULL, base_year); isa_qdev_register(&mc146818rtc_info); } device_init(mc146818rtc_register) /* Memory mapped interface */ static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr) Loading
hw/mips_jazz.c +1 −1 Original line number Diff line number Diff line Loading @@ -241,7 +241,7 @@ void mips_jazz_init (ram_addr_t ram_size, fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds); /* Real time clock */ rtc_init(0x70, i8259[8], 1980); rtc_init(1980); s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env); cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc); Loading
hw/mips_malta.c +1 −1 Original line number Diff line number Diff line Loading @@ -923,7 +923,7 @@ void mips_malta_init (ram_addr_t ram_size, /* Super I/O */ isa_dev = isa_create_simple("i8042"); rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); rtc_state = rtc_init(2000); serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]); serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]); if (parallel_hds[0]) Loading
hw/mips_r4k.c +1 −1 Original line number Diff line number Diff line Loading @@ -244,7 +244,7 @@ void mips_r4k_init (ram_addr_t ram_size, isa_bus_new(NULL); isa_bus_irqs(i8259); rtc_state = rtc_init(0x70, i8259[8], 2000); rtc_state = rtc_init(2000); /* Register 64 KB of ISA IO space at 0x14000000 */ isa_mmio_init(0x14000000, 0x00010000); Loading
hw/pc.c +1 −1 Original line number Diff line number Diff line Loading @@ -1313,7 +1313,7 @@ static void pc_init1(ram_addr_t ram_size, } } rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); rtc_state = rtc_init(2000); qemu_register_boot_set(pc_boot_set, rtc_state); Loading