Commit 31a1246d authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé Committed by Peter Maydell
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hw/ssi/omap_spi: Use qemu_log_mask(GUEST_ERROR) instead of fprintf



Signed-off-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Message-id: 20180624040609.17572-6-f4bug@amsat.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent e26745d5
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+10 −5
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "hw/hw.h"
#include "hw/arm/omap.h"

@@ -294,11 +295,15 @@ static void omap_mcspi_write(void *opaque, hwaddr addr,
    case 0x2c:	/* MCSPI_CHCONF */
        if ((value ^ s->ch[ch].config) & (3 << 14))	/* DMAR | DMAW */
            omap_mcspi_dmarequest_update(s->ch + ch);
        if (((value >> 12) & 3) == 3)			/* TRM */
            fprintf(stderr, "%s: invalid TRM value (3)\n", __func__);
        if (((value >> 7) & 0x1f) < 3)			/* WL */
            fprintf(stderr, "%s: invalid WL value (%" PRIx64 ")\n",
        if (((value >> 12) & 3) == 3) { /* TRM */
            qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid TRM value (3)\n",
                          __func__);
        }
        if (((value >> 7) & 0x1f) < 3) { /* WL */
            qemu_log_mask(LOG_GUEST_ERROR,
                          "%s: invalid WL value (%" PRIx64 ")\n",
                          __func__, (value >> 7) & 0x1f);
        }
        s->ch[ch].config = value & 0x7fffff;
        break;