Commit 31266e68 authored by Richard Henderson's avatar Richard Henderson
Browse files

target/unicore32: Use env_cpu, env_archcpu



Cleanup in the boilerplate that each target must define.
Replace uc32_env_get_cpu with env_archcpu.  The combination
CPU(uc32_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 06eb2e29
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+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ static void puv3_soc_init(CPUUniCore32State *env)

    /* Initialize interrupt controller */
    cpu_intc = qemu_allocate_irq(puv3_intc_cpu_handler,
                                 uc32_env_get_cpu(env), 0);
                                 env_archcpu(env), 0);
    dev = sysbus_create_simple("puv3_intc", PUV3_INTC_BASE, cpu_intc);
    for (i = 0; i < PUV3_IRQS_NR; i++) {
        irqs[i] = qdev_get_gpio_in(dev, i);
+0 −5
Original line number Diff line number Diff line
@@ -76,11 +76,6 @@ struct UniCore32CPU {
    CPUUniCore32State env;
};

static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env)
{
    return container_of(env, UniCore32CPU, env);
}

#define ENV_OFFSET offsetof(UniCore32CPU, env)

void uc32_cpu_do_interrupt(CPUState *cpu);
+1 −3
Original line number Diff line number Diff line
@@ -31,8 +31,6 @@
void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg,
        uint32_t cop)
{
    UniCore32CPU *cpu = uc32_env_get_cpu(env);

    /*
     * movc pp.nn, rn, #imm9
     *      rn: UCOP_REG_D
@@ -101,7 +99,7 @@ void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg,
    case 6:
        if ((cop <= 6) && (cop >= 2)) {
            /* invalid all tlb */
            tlb_flush(CPU(cpu));
            tlb_flush(env_cpu(env));
            return;
        }
        break;
+1 −1
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@

void HELPER(exception)(CPUUniCore32State *env, uint32_t excp)
{
    CPUState *cs = CPU(uc32_env_get_cpu(env));
    CPUState *cs = env_cpu(env);

    cs->exception_index = excp;
    cpu_loop_exit(cs);
+4 −7
Original line number Diff line number Diff line
@@ -36,8 +36,6 @@
/* Map CPU modes onto saved register banks.  */
static inline int bank_number(CPUUniCore32State *env, int mode)
{
    UniCore32CPU *cpu = uc32_env_get_cpu(env);

    switch (mode) {
    case ASR_MODE_USER:
    case ASR_MODE_SUSR:
@@ -51,7 +49,7 @@ static inline int bank_number(CPUUniCore32State *env, int mode)
    case ASR_MODE_INTR:
        return 4;
    }
    cpu_abort(CPU(cpu), "Bad mode %x\n", mode);
    cpu_abort(env_cpu(env), "Bad mode %x\n", mode);
    return -1;
}

@@ -126,8 +124,7 @@ static int get_phys_addr_ucv2(CPUUniCore32State *env, uint32_t address,
        int access_type, int is_user, uint32_t *phys_ptr, int *prot,
        target_ulong *page_size)
{
    UniCore32CPU *cpu = uc32_env_get_cpu(env);
    CPUState *cs = CPU(cpu);
    CPUState *cs = env_cpu(env);
    int code;
    uint32_t table;
    uint32_t desc;
@@ -174,11 +171,11 @@ static int get_phys_addr_ucv2(CPUUniCore32State *env, uint32_t address,
            *page_size = TARGET_PAGE_SIZE;
            break;
        default:
            cpu_abort(CPU(cpu), "wrong page type!");
            cpu_abort(cs, "wrong page type!");
        }
        break;
    default:
        cpu_abort(CPU(cpu), "wrong page type!");
        cpu_abort(cs, "wrong page type!");
    }

    *phys_ptr = phys_addr;
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