Commit 2fb1f7d2 authored by Markus Armbruster's avatar Markus Armbruster
Browse files

arm/stm32f405: Fix realization of "stm32f2xx-adc" devices 



stm32f405_soc_initfn() creates six such devices, but
stm32f405_soc_realize() realizes only one.  Affects machine
netduinoplus2.

In theory, a device becomes real only on realize.  In practice, the
transition from unreal to real is a fuzzy one.  The work to make a
device real can be spread between realize methods (fine),
instance_init methods (wrong), and board code wiring up the device
(fine as long as it effectively happens on realize).  Depending on
what exactly is done where, a device can work even when we neglect
to realize it.

The five unrealized devices appear to stay unreal: neither MMIO nor
IRQ get wired up.

Fix stm32f405_soc_realize() to realize and wire up all six.  Visible
in "info qtree":

     bus: main-system-bus
       type System
       dev: stm32f405-soc, id ""
         cpu-type = "cortex-m4-arm-cpu"
       dev: stm32f2xx-adc, id ""
         gpio-out "sysbus-irq" 1
    -    mmio ffffffffffffffff/00000000000000ff
    +    mmio 0000000040012000/00000000000000ff
       dev: stm32f2xx-adc, id ""
         gpio-out "sysbus-irq" 1
    -    mmio ffffffffffffffff/00000000000000ff
    +    mmio 0000000040012100/00000000000000ff
       dev: stm32f2xx-adc, id ""
         gpio-out "sysbus-irq" 1
    -    mmio ffffffffffffffff/00000000000000ff
    +    mmio 0000000040012200/00000000000000ff
       dev: stm32f2xx-adc, id ""
         gpio-out "sysbus-irq" 1
    -    mmio ffffffffffffffff/00000000000000ff
    +    mmio 0000000040012300/00000000000000ff
       dev: stm32f2xx-adc, id ""
         gpio-out "sysbus-irq" 1
    -    mmio 0000000040012000/00000000000000ff
    +    mmio 0000000040012400/00000000000000ff
       dev: stm32f2xx-adc, id ""
         gpio-out "sysbus-irq" 1
    -    mmio ffffffffffffffff/00000000000000ff
    +    mmio 0000000040012500/00000000000000ff
       dev: armv7m, id ""

Fixes: 529fc5fd
Cc: Alistair Francis <alistair@alistair23.me>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
Signed-off-by: default avatarMarkus Armbruster <armbru@redhat.com>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200609122339.937862-2-armbru@redhat.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
parent e8c9e658

hw/arm/stm32f405_soc.c

+13 −10
Original line number Diff line number Diff line
@@ -37,7 +37,8 @@ static const uint32_t usart_addr[] = { 0x40011000, 0x40004400, 0x40004800, 
/* At the moment only Timer 2 to 5 are modelled */

static const uint32_t timer_addr[] = { 0x40000000, 0x40000400,

                                       0x40000800, 0x40000C00 };

#define ADC_ADDR                       0x40012000

static const uint32_t adc_addr[] = { 0x40012000, 0x40012100, 0x40012200,

                                     0x40012300, 0x40012400, 0x40012500 };

static const uint32_t spi_addr[] =   { 0x40013000, 0x40003800, 0x40003C00,

                                       0x40013400, 0x40015000, 0x40015400 };

#define EXTI_ADDR                      0x40013C00
@@ -185,6 +186,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) 
    qdev_connect_gpio_out(DEVICE(&s->adc_irqs), 0,

                          qdev_get_gpio_in(armv7m, ADC_IRQ));



    for (i = 0; i < STM_NUM_ADCS; i++) {

        dev = DEVICE(&(s->adc[i]));

        object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &err);

        if (err != NULL) {
@@ -192,9 +194,10 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) 
            return;

        }

        busdev = SYS_BUS_DEVICE(dev);

    sysbus_mmio_map(busdev, 0, ADC_ADDR);

        sysbus_mmio_map(busdev, 0, adc_addr[i]);

        sysbus_connect_irq(busdev, 0,

                           qdev_get_gpio_in(DEVICE(&s->adc_irqs), i));

    }



    /* SPI devices */

    for (i = 0; i < STM_NUM_SPIS; i++) {