Commit 2e4bd4a2 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.13-20180504' into staging 



ppc patch queue 2018-05-04

Second patch of patches for qemu-2.13 (or whatever the version ends up
being called).  Highlights are:
  * Preliminary patches for POWER9 hash MMU support for powernv
  * A number of cleanups fo pseries startup and LPCR handling
  * Remove support for explicitly allocated RMAs (which require kernel
    support that's been gone for 3+ years)
  * Some mac_newworld cleanups
  * A few bugfixes

# gpg: Signature made Fri 04 May 2018 06:07:43 BST
# gpg:                using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.13-20180504:
  spapr: don't advertise radix GTSE if max-compat-cpu < power9
  spapr: don't migrate "spapr_option_vector_ov5_cas" to pre 2.8 machines
  target/ppc: always set PPC_MEM_TLBIE in pre 2.8 migration hack
  mac_newworld: move wiring of macio IRQs to macio_newworld_realize()
  mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly
  uninorth: create new uninorth device
  spapr: Clean up handling of LPCR power-saving exit bits
  spapr: Move PAPR mode cpu setup fully to spapr code
  target/ppc: Delay initialization of LPCR_UPRT for secondary cpus
  spapr: Clean up LPCR updates from hypercalls
  spapr: Make a helper to set up cpu entry point state
  spapr: Remove unhelpful helpers from rtas_start_cpu()
  spapr: Clean up rtas_start_cpu() & rtas_stop_self()
  target/ppc: Add ppc_store_lpcr() helper
  spapr: Remove support for explicitly allocated RMAs
  target/ppc: add basic support for PTCR on POWER9
  target/ppc: return a nil HPT base address on sPAPR machines

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents f0c88952 0550b120

hw/misc/macio/macio.c

+23 −16
Original line number Diff line number Diff line
@@ -279,11 +279,10 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) 
{

    MacIOState *s = MACIO(d);

    NewWorldMacIOState *ns = NEWWORLD_MACIO(d);

    DeviceState *pic_dev = DEVICE(ns->pic);

    Error *err = NULL;

    SysBusDevice *sysbus_dev;

    MemoryRegion *timer_memory = NULL;

    int i;

    int cur_irq = 0;



    macio_common_realize(d, &err);

    if (err) {
@@ -292,11 +291,14 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) 
    }



    sysbus_dev = SYS_BUS_DEVICE(&s->cuda);

    sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);

    sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,

                                                       NEWWORLD_CUDA_IRQ));



    sysbus_dev = SYS_BUS_DEVICE(&s->escc);

    sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);

    sysbus_connect_irq(sysbus_dev, 1, ns->irqs[cur_irq++]);

    sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,

                                                       NEWWORLD_ESCCB_IRQ));

    sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,

                                                       NEWWORLD_ESCCA_IRQ));



    /* OpenPIC */

    sysbus_dev = SYS_BUS_DEVICE(ns->pic);
@@ -304,15 +306,22 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) 
                                sysbus_mmio_get_region(sysbus_dev, 0));



    /* IDE buses */

    for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {

        qemu_irq irq0 = ns->irqs[cur_irq++];

        qemu_irq irq1 = ns->irqs[cur_irq++];



        macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);

    macio_realize_ide(s, &ns->ide[0],

                      qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),

                      qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),

                      0x16, &err);

    if (err) {

        error_propagate(errp, err);

        return;

    }



    macio_realize_ide(s, &ns->ide[1],

                      qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),

                      qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),

                      0x1a, &err);

    if (err) {

        error_propagate(errp, err);

        return;

    }



    /* Timer */
@@ -328,8 +337,6 @@ static void macio_newworld_init(Object *obj) 
    NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);

    int i;



    qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));



    object_property_add_link(obj, "pic", TYPE_OPENPIC,

                             (Object **) &ns->pic,

                             qdev_prop_allow_set_link_before_realize,

hw/pci-host/trace-events

+2 −0
Original line number Diff line number Diff line
@@ -18,3 +18,5 @@ unin_set_irq(int irq_num, int level) "setting INT %d = %d" 
unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32

unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64

unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64

unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64

unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64

hw/pci-host/uninorth.c

+58 −0
Original line number Diff line number Diff line
@@ -519,6 +519,62 @@ static const TypeInfo pci_unin_internal_info = { 
    .class_init    = pci_unin_internal_class_init,

};



/* UniN device */

static void unin_write(void *opaque, hwaddr addr, uint64_t value,

                       unsigned size)

{

    trace_unin_write(addr, value);

    if (addr == 0x0) {

        *(int *)opaque = value;

    }

}



static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)

{

    uint32_t value;



    value = 0;

    switch (addr) {

    case 0:

        value = *(int *)opaque;

    }



    trace_unin_read(addr, value);



    return value;

}



static const MemoryRegionOps unin_ops = {

    .read = unin_read,

    .write = unin_write,

    .endianness = DEVICE_BIG_ENDIAN,

};



static void unin_init(Object *obj)

{

    UNINState *s = UNI_NORTH(obj);

    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);



    memory_region_init_io(&s->mem, obj, &unin_ops, &s->token, "unin", 0x1000);



    sysbus_init_mmio(sbd, &s->mem);

}



static void unin_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);



    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);

}



static const TypeInfo unin_info = {

    .name          = TYPE_UNI_NORTH,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(UNINState),

    .instance_init = unin_init,

    .class_init    = unin_class_init,

};



static void unin_register_types(void)

{

    type_register_static(&unin_main_pci_host_info);
@@ -530,6 +586,8 @@ static void unin_register_types(void) 
    type_register_static(&pci_u3_agp_info);

    type_register_static(&pci_unin_agp_info);

    type_register_static(&pci_unin_internal_info);



    type_register_static(&unin_info);

}



type_init(unin_register_types)

hw/ppc/mac.h

+9 −0
Original line number Diff line number Diff line
@@ -56,6 +56,15 @@ 
#define OLDWORLD_IDE1_IRQ      0xe

#define OLDWORLD_IDE1_DMA_IRQ  0x3



/* New World IRQs */

#define NEWWORLD_CUDA_IRQ      0x19

#define NEWWORLD_ESCCB_IRQ     0x24

#define NEWWORLD_ESCCA_IRQ     0x25

#define NEWWORLD_IDE0_IRQ      0xd

#define NEWWORLD_IDE0_DMA_IRQ  0x2

#define NEWWORLD_IDE1_IRQ      0xe

#define NEWWORLD_IDE1_DMA_IRQ  0x3



/* MacIO */

#define TYPE_MACIO_IDE "macio-ide"

#define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)

hw/ppc/mac_newworld.c

+7 −49
Original line number Diff line number Diff line
@@ -82,36 +82,6 @@ 


#define NDRV_VGA_FILENAME "qemu_vga.ndrv"



/* UniN device */

static void unin_write(void *opaque, hwaddr addr, uint64_t value,

                       unsigned size)

{

    trace_mac99_uninorth_write(addr, value);

    if (addr == 0x0) {

        *(int*)opaque = value;

    }

}



static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)

{

    uint32_t value;



    value = 0;

    switch (addr) {

    case 0:

        value = *(int*)opaque;

    }



    trace_mac99_uninorth_read(addr, value);



    return value;

}



static const MemoryRegionOps unin_ops = {

    .read = unin_read,

    .write = unin_write,

    .endianness = DEVICE_NATIVE_ENDIAN,

};



static void fw_cfg_boot_set(void *opaque, const char *boot_device,

                            Error **errp)
@@ -144,8 +114,7 @@ static void ppc_core99_init(MachineState *machine) 
    PowerPCCPU *cpu = NULL;

    CPUPPCState *env = NULL;

    char *filename;

    qemu_irq *pic, **openpic_irqs;

    MemoryRegion *unin_memory = g_new(MemoryRegion, 1);

    qemu_irq **openpic_irqs;

    int linux_boot, i, j, k;

    MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);

    hwaddr kernel_base, initrd_base, cmdline_base = 0;
@@ -164,7 +133,6 @@ static void ppc_core99_init(MachineState *machine) 
    int machine_arch;

    SysBusDevice *s;

    DeviceState *dev, *pic_dev;

    int *token = g_new(int, 1);

    hwaddr nvram_addr = 0xFFF04000;

    uint64_t tbfreq;
@@ -272,9 +240,12 @@ static void ppc_core99_init(MachineState *machine) 
        }

    }



    /* UniN init: XXX should be a real device */

    memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000);

    memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);

    /* UniN init */

    dev = qdev_create(NULL, TYPE_UNI_NORTH);

    qdev_init_nofail(dev);

    s = SYS_BUS_DEVICE(dev);

    memory_region_add_subregion(get_system_memory(), 0xf8000000,

                                sysbus_mmio_get_region(s, 0));



    openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));

    openpic_irqs[0] =
@@ -320,8 +291,6 @@ static void ppc_core99_init(MachineState *machine) 
        }

    }



    pic = g_new0(qemu_irq, 64);



    pic_dev = qdev_create(NULL, TYPE_OPENPIC);

    qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);

    qdev_init_nofail(pic_dev);
@@ -333,10 +302,6 @@ static void ppc_core99_init(MachineState *machine) 
        }

    }



    for (i = 0; i < 64; i++) {

        pic[i] = qdev_get_gpio_in(pic_dev, i);

    }



    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {

        /* 970 gets a U3 bus */

        /* Uninorth AGP bus */
@@ -410,13 +375,6 @@ static void ppc_core99_init(MachineState *machine) 
    /* MacIO */

    macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));

    dev = DEVICE(macio);

    qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */

    qdev_connect_gpio_out(dev, 1, pic[0x24]); /* ESCC-B */

    qdev_connect_gpio_out(dev, 2, pic[0x25]); /* ESCC-A */

    qdev_connect_gpio_out(dev, 3, pic[0x0d]); /* IDE */

    qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */

    qdev_connect_gpio_out(dev, 5, pic[0x0e]); /* IDE */

    qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE DMA */

    qdev_prop_set_uint64(dev, "frequency", tbfreq);

    object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",

                             &error_abort);