Commit 2dd081ae authored by Edgar E. Iglesias's avatar Edgar E. Iglesias Committed by Peter Maydell
Browse files

target-arm: A64: Correct updates to FAR and ESR on exceptions 



Not all exception types update both FAR and ESR.

Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarGreg Bellows <greg.bellows@linaro.org>
Signed-off-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1411718914-6608-7-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent dfafd090

target-arm/helper-a64.c

+3 −4
Original line number Diff line number Diff line
@@ -466,18 +466,17 @@ void aarch64_cpu_do_interrupt(CPUState *cs) 
                      env->exception.syndrome);

    }



    env->cp15.esr_el[new_el] = env->exception.syndrome;

    env->cp15.far_el[new_el] = env->exception.vaddress;



    switch (cs->exception_index) {

    case EXCP_PREFETCH_ABORT:

    case EXCP_DATA_ABORT:

        env->cp15.far_el[new_el] = env->exception.vaddress;

        qemu_log_mask(CPU_LOG_INT, "...with FAR 0x%" PRIx64 "\n",

                      env->cp15.far_el[new_el]);

        break;

        /* fall through */

    case EXCP_BKPT:

    case EXCP_UDEF:

    case EXCP_SWI:

        env->cp15.esr_el[new_el] = env->exception.syndrome;

        break;

    case EXCP_IRQ:

        addr += 0x80;