Commit 2c7590c8 authored by David Hildenbrand's avatar David Hildenbrand Committed by Cornelia Huck
Browse files

s390x/tcg: Implement VECTOR UNPACK * 



Combine all variant in a single handler. As source and destination
have different element sizes, we can't use gvec expansion. Expand
manually. Also watch out for overlapping source and destination
registers. Use a safe evaluation order depending on the operation.

Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarDavid Hildenbrand <david@redhat.com>
Message-Id: <20190307121539.12842-33-david@redhat.com>
Signed-off-by: default avatarCornelia Huck <cohuck@redhat.com>
parent 0e0a5b49

target/s390x/insn-data.def

+8 −0
Original line number Diff line number Diff line
@@ -1045,6 +1045,14 @@ 
    F(0xe73e, VSTM,    VRS_a, V,   la2, 0, 0, 0, vstm, 0, IF_VEC)

/* VECTOR STORE WITH LENGTH */

    F(0xe73f, VSTL,    VRS_b, V,   la2, r3_32u, 0, 0, vstl, 0, IF_VEC)

/* VECTOR UNPACK HIGH */

    F(0xe7d7, VUPH,    VRR_a, V,   0, 0, 0, 0, vup, 0, IF_VEC)

/* VECTOR UNPACK LOGICAL HIGH */

    F(0xe7d5, VUPLH,   VRR_a, V,   0, 0, 0, 0, vup, 0, IF_VEC)

/* VECTOR UNPACK LOW */

    F(0xe7d6, VUPL,    VRR_a, V,   0, 0, 0, 0, vup, 0, IF_VEC)

/* VECTOR UNPACK LOGICAL LOW */

    F(0xe7d4, VUPLL,   VRR_a, V,   0, 0, 0, 0, vup, 0, IF_VEC)



#ifndef CONFIG_USER_ONLY

/* COMPARE AND SWAP AND PURGE */

target/s390x/translate_vx.inc.c

+38 −0
Original line number Diff line number Diff line
@@ -895,3 +895,41 @@ static DisasJumpType op_vstl(DisasContext *s, DisasOps *o) 
    tcg_temp_free_ptr(a0);

    return DISAS_NEXT;

}



static DisasJumpType op_vup(DisasContext *s, DisasOps *o)

{

    const bool logical = s->fields->op2 == 0xd4 || s->fields->op2 == 0xd5;

    const uint8_t v1 = get_field(s->fields, v1);

    const uint8_t v2 = get_field(s->fields, v2);

    const uint8_t src_es = get_field(s->fields, m3);

    const uint8_t dst_es = src_es + 1;

    int dst_idx, src_idx;

    TCGv_i64 tmp;



    if (src_es > ES_32) {

        gen_program_exception(s, PGM_SPECIFICATION);

        return DISAS_NORETURN;

    }



    tmp = tcg_temp_new_i64();

    if (s->fields->op2 == 0xd7 || s->fields->op2 == 0xd5) {

        /* iterate backwards to avoid overwriting data we might need later */

        for (dst_idx = NUM_VEC_ELEMENTS(dst_es) - 1; dst_idx >= 0; dst_idx--) {

            src_idx = dst_idx;

            read_vec_element_i64(tmp, v2, src_idx,

                                 src_es | (logical ? 0 : MO_SIGN));

            write_vec_element_i64(tmp, v1, dst_idx, dst_es);

        }



    } else {

        /* iterate forward to avoid overwriting data we might need later */

        for (dst_idx = 0; dst_idx < NUM_VEC_ELEMENTS(dst_es); dst_idx++) {

            src_idx = dst_idx + NUM_VEC_ELEMENTS(src_es) / 2;

            read_vec_element_i64(tmp, v2, src_idx,

                                 src_es | (logical ? 0 : MO_SIGN));

            write_vec_element_i64(tmp, v1, dst_idx, dst_es);

        }

    }

    tcg_temp_free_i64(tmp);

    return DISAS_NEXT;

}