Commit 2b7ec66f authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg: Mask TCGMemOp appropriately for indexing 



The addition of MO_AMASK means that places that used inverted masks
need to be changed to use positive masks, and places that failed to
mask the intended bits need updating.

Reviewed-by: default avatarYongbok Kim <yongbok.kim@imgtec.com>
Tested-by: default avatarYongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent 44ee94e4

tcg/aarch64/tcg-target.c

+2 −2
Original line number Diff line number Diff line
@@ -1004,7 +1004,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) 
    tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);

    tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X2, oi);

    tcg_out_adr(s, TCG_REG_X3, lb->raddr);

    tcg_out_call(s, qemu_ld_helpers[opc & ~MO_SIGN]);

    tcg_out_call(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]);

    if (opc & MO_SIGN) {

        tcg_out_sxt(s, lb->type, size, lb->datalo_reg, TCG_REG_X0);

    } else {
@@ -1027,7 +1027,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) 
    tcg_out_mov(s, size == MO_64, TCG_REG_X2, lb->datalo_reg);

    tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_X3, oi);

    tcg_out_adr(s, TCG_REG_X4, lb->raddr);

    tcg_out_call(s, qemu_st_helpers[opc]);

    tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);

    tcg_out_goto(s, lb->raddr);

}

tcg/arm/tcg-target.c

+3 −3
Original line number Diff line number Diff line
@@ -1260,9 +1260,9 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) 
       icache usage.  For pre-armv6, use the signed helpers since we do

       not have a single insn sign-extend.  */

    if (use_armv6_instructions) {

        func = qemu_ld_helpers[opc & ~MO_SIGN];

        func = qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)];

    } else {

        func = qemu_ld_helpers[opc];

        func = qemu_ld_helpers[opc & (MO_BSWAP | MO_SSIZE)];

        if (opc & MO_SIGN) {

            opc = MO_UL;

        }
@@ -1337,7 +1337,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) 
    argreg = tcg_out_arg_reg32(s, argreg, TCG_REG_R14);



    /* Tail-call to the helper, which will return to the fast path.  */

    tcg_out_goto(s, COND_AL, qemu_st_helpers[opc]);

    tcg_out_goto(s, COND_AL, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);

}

#endif /* SOFTMMU */

tcg/i386/tcg-target.c

+2 −2
Original line number Diff line number Diff line
@@ -1307,7 +1307,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) 
                     (uintptr_t)l->raddr);

    }



    tcg_out_call(s, qemu_ld_helpers[opc & ~MO_SIGN]);

    tcg_out_call(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]);



    data_reg = l->datalo_reg;

    switch (opc & MO_SSIZE) {
@@ -1413,7 +1413,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) 


    /* "Tail call" to the helper, with the return address back inline.  */

    tcg_out_push(s, retaddr);

    tcg_out_jmp(s, qemu_st_helpers[opc]);

    tcg_out_jmp(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);

}

#elif defined(__x86_64__) && defined(__linux__)

# include <asm/prctl.h>

tcg/mips/tcg-target.c

+2 −2
Original line number Diff line number Diff line
@@ -1031,7 +1031,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) 
    }

    i = tcg_out_call_iarg_imm(s, i, oi);

    i = tcg_out_call_iarg_imm(s, i, (intptr_t)l->raddr);

    tcg_out_call_int(s, qemu_ld_helpers[opc], false);

    tcg_out_call_int(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SSIZE)], false);

    /* delay slot */

    tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);
@@ -1094,7 +1094,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) 
       computation to take place in the return address register.  */

    tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_RA, (intptr_t)l->raddr);

    i = tcg_out_call_iarg_reg(s, i, TCG_REG_RA);

    tcg_out_call_int(s, qemu_st_helpers[opc], true);

    tcg_out_call_int(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)], true);

    /* delay slot */

    tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);

}

tcg/ppc/tcg-target.c

+4 −4
Original line number Diff line number Diff line
@@ -1495,7 +1495,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) 
    tcg_out_movi(s, TCG_TYPE_I32, arg++, oi);

    tcg_out32(s, MFSPR | RT(arg) | LR);



    tcg_out_call(s, qemu_ld_helpers[opc & ~MO_SIGN]);

    tcg_out_call(s, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]);



    lo = lb->datalo_reg;

    hi = lb->datahi_reg;
@@ -1565,7 +1565,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) 
    tcg_out_movi(s, TCG_TYPE_I32, arg++, oi);

    tcg_out32(s, MFSPR | RT(arg) | LR);



    tcg_out_call(s, qemu_st_helpers[opc]);

    tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);



    tcg_out_b(s, 0, lb->raddr);

}
@@ -1624,7 +1624,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) 
            tcg_out32(s, LWZ | TAI(datalo, addrlo, 4));

        }

    } else {

        uint32_t insn = qemu_ldx_opc[opc];

        uint32_t insn = qemu_ldx_opc[opc & (MO_BSWAP | MO_SSIZE)];

        if (!HAVE_ISA_2_06 && insn == LDBRX) {

            tcg_out32(s, ADDI | TAI(TCG_REG_R0, addrlo, 4));

            tcg_out32(s, LWBRX | TAB(datalo, rbase, addrlo));
@@ -1696,7 +1696,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) 
            tcg_out32(s, STW | TAI(datalo, addrlo, 4));

        }

    } else {

        uint32_t insn = qemu_stx_opc[opc];

        uint32_t insn = qemu_stx_opc[opc & (MO_BSWAP | MO_SIZE)];

        if (!HAVE_ISA_2_06 && insn == STDBRX) {

            tcg_out32(s, STWBRX | SAB(datalo, rbase, addrlo));

            tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, addrlo, 4));