Commit 2452731c authored by Peter Maydell's avatar Peter Maydell
Browse files

target-arm: Support coprocessor registers which do I/O 



Add an ARM_CP_IO flag which an ARMCPRegInfo definition can use to
indicate that the register's implementation does I/O and thus
its accesses need to be surrounded by gen_io_start()/gen_io_end()
in order for icount to work. Most notably, cp registers which
implement clocks or timers need this.

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Tested-by: default avatarLaurent Desnogues <laurent.desnogues@gmail.com>
Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 1376065080-26661-3-git-send-email-peter.maydell@linaro.org
parent 22d9e1a9

target-arm/cpu.h

+5 −1
Original line number Diff line number Diff line
@@ -472,6 +472,9 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) 
 * old must have the OVERRIDE bit set.

 * NO_MIGRATE indicates that this register should be ignored for migration;

 * (eg because any state is accessed via some other coprocessor register).

 * IO indicates that this register does I/O and therefore its accesses

 * need to be surrounded by gen_io_start()/gen_io_end(). In particular,

 * registers which implement clocks or timers require this.

 */

#define ARM_CP_SPECIAL 1

#define ARM_CP_CONST 2
@@ -479,13 +482,14 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) 
#define ARM_CP_SUPPRESS_TB_END 8

#define ARM_CP_OVERRIDE 16

#define ARM_CP_NO_MIGRATE 32

#define ARM_CP_IO 64

#define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8))

#define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8))

#define ARM_LAST_SPECIAL ARM_CP_WFI

/* Used only as a terminator for ARMCPRegInfo lists */

#define ARM_CP_SENTINEL 0xffff

/* Mask of only the flag bits in a type field */

#define ARM_CP_FLAG_MASK 0x3f

#define ARM_CP_FLAG_MASK 0x7f



/* Return true if cptype is a valid type field. This is used to try to

 * catch errors where the sentinel has been accidentally left off the end

target-arm/translate.c

+13 −3
Original line number Diff line number Diff line
@@ -6280,6 +6280,10 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) 
            break;

        }



        if (use_icount && (ri->type & ARM_CP_IO)) {

            gen_io_start();

        }



        if (isread) {

            /* Read */

            if (is64) {
@@ -6369,14 +6373,20 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) 
                    store_cpu_offset(tmp, ri->fieldoffset);

                }

            }

        }



        if (use_icount && (ri->type & ARM_CP_IO)) {

            /* I/O operations must end the TB here (whether read or write) */

            gen_io_end();

            gen_lookup_tb(s);

        } else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {

            /* We default to ending the TB on a coprocessor register write,

             * but allow this to be suppressed by the register definition

             * (usually only necessary to work around guest bugs).

             */

            if (!(ri->type & ARM_CP_SUPPRESS_TB_END)) {

            gen_lookup_tb(s);

        }

        }



        return 0;

    }