Commit 23b96cdb authored by Andreas Färber's avatar Andreas Färber
Browse files

prep: Add i82374 DMA emulation 



Prepare Intel 82374 emulation for use by Intel 82378 PCI->ISA bridge.

Signed-off-by: default avatarHervé Poussineau <hpoussin@reactos.org>

Confine to CONFIG_I82374. Add VMState.

Signed-off-by: default avatarAndreas Färber <andreas.faerber@web.de>
Reviewed-by: default avatarAlexander Graf <agraf@suse.de>
parent 1c75457f

Makefile.objs

+1 −0
Original line number Diff line number Diff line
@@ -216,6 +216,7 @@ hw-obj-$(CONFIG_FDC) += fdc.o 
hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o

hw-obj-$(CONFIG_APM) += pm_smbus.o apm.o

hw-obj-$(CONFIG_DMA) += dma.o

hw-obj-$(CONFIG_I82374) += i82374.o

hw-obj-$(CONFIG_HPET) += hpet.o

hw-obj-$(CONFIG_APPLESMC) += applesmc.o

hw-obj-$(CONFIG_SMARTCARD) += usb-ccid.o ccid-card-passthru.o

default-configs/ppc-softmmu.mak

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ CONFIG_I8254=y 
CONFIG_PCKBD=y

CONFIG_FDC=y

CONFIG_DMA=y

CONFIG_I82374=y

CONFIG_OPENPIC=y

CONFIG_PREP_PCI=y

CONFIG_MACIO=y

hw/i82374.c

0 → 100644
+154 −0
Original line number Diff line number Diff line 
/*

 * QEMU Intel 82374 emulation (Enhanced DMA controller)

 *

 * Copyright (c) 2010 Hervé Poussineau

 *

 * Permission is hereby granted, free of charge, to any person obtaining a copy

 * of this software and associated documentation files (the "Software"), to deal

 * in the Software without restriction, including without limitation the rights

 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

 * copies of the Software, and to permit persons to whom the Software is

 * furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

 * THE SOFTWARE.

 */



#include "isa.h"



//#define DEBUG_I82374



#ifdef DEBUG_I82374

#define DPRINTF(fmt, ...) \

do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)

#else

#define DPRINTF(fmt, ...) \

do {} while (0)

#endif

#define BADF(fmt, ...) \

do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)



typedef struct I82374State {

    uint8_t commands[8];

} I82374State;



static const VMStateDescription vmstate_i82374 = {

    .name = "i82374",

    .version_id = 0,

    .minimum_version_id = 0,

    .fields = (VMStateField[]) {

        VMSTATE_UINT8_ARRAY(commands, I82374State, 8),

        VMSTATE_END_OF_LIST()

    },

};



static uint32_t i82374_read_isr(void *opaque, uint32_t nport)

{

    uint32_t val = 0;



    BADF("%s: %08x\n", __func__, nport);



    DPRINTF("%s: %08x=%08x\n", __func__, nport, val);

    return val;

}



static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)

{

    DPRINTF("%s: %08x=%08x\n", __func__, nport, data);



    if (data != 0x42) {

        /* Not Stop S/G command */

        BADF("%s: %08x=%08x\n", __func__, nport, data);

    }

}



static uint32_t i82374_read_status(void *opaque, uint32_t nport)

{

    uint32_t val = 0;



    BADF("%s: %08x\n", __func__, nport);



    DPRINTF("%s: %08x=%08x\n", __func__, nport, val);

    return val;

}



static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)

{

    DPRINTF("%s: %08x=%08x\n", __func__, nport, data);



    BADF("%s: %08x=%08x\n", __func__, nport, data);

}



static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)

{

    uint32_t val = 0;



    BADF("%s: %08x\n", __func__, nport);



    DPRINTF("%s: %08x=%08x\n", __func__, nport, val);

    return val;

}



static void i82374_init(I82374State *s)

{

    DMA_init(1, NULL);

    memset(s->commands, 0, sizeof(s->commands));

}



typedef struct ISAi82374State {

    ISADevice dev;

    uint32_t iobase;

    I82374State state;

} ISAi82374State;



static const VMStateDescription vmstate_isa_i82374 = {

    .name = "isa-i82374",

    .version_id = 0,

    .minimum_version_id = 0,

    .fields = (VMStateField[]) {

        VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State),

        VMSTATE_END_OF_LIST()

    },

};



static int i82374_isa_init(ISADevice *dev)

{

    ISAi82374State *isa = DO_UPCAST(ISAi82374State, dev, dev);

    I82374State *s = &isa->state;



    register_ioport_read(isa->iobase + 0x0A, 1, 1, i82374_read_isr, s);

    register_ioport_write(isa->iobase + 0x10, 8, 1, i82374_write_command, s);

    register_ioport_read(isa->iobase + 0x18, 8, 1, i82374_read_status, s);

    register_ioport_write(isa->iobase + 0x20, 0x20, 1, i82374_write_descriptor, s);

    register_ioport_read(isa->iobase + 0x20, 0x20, 1, i82374_read_descriptor, s);



    i82374_init(s);



    return 0;

}



static ISADeviceInfo i82374_isa_info = {

    .qdev.name  = "i82374",

    .qdev.size  = sizeof(ISAi82374State),

    .qdev.vmsd  = &vmstate_isa_i82374,

    .init       = i82374_isa_init,

    .qdev.props = (Property[]) {

        DEFINE_PROP_HEX32("iobase", ISAi82374State, iobase, 0x400),

        DEFINE_PROP_END_OF_LIST()

    },

};



static void i82374_register_devices(void)

{

    isa_qdev_register(&i82374_isa_info);

}



device_init(i82374_register_devices)