Commit 235352ee authored by Peter Maydell's avatar Peter Maydell Committed by David Gibson
Browse files

hw/ppc: Take QEMU lock when calling ppc_dcr_read/write() 



The ppc_dcr_read() and ppc_dcr_write() functions call into callbacks
in device code, so we need to hold the QEMU iothread lock while
calling them.  This is the case already for the callsites in
kvmppc_handle_dcr_read/write(), but we must also take the lock when
calling the helpers from TCG.

This fixes a bug where attempting to initialise the PPC405EP
SDRAM will cause an assertion when sdram_map_bcr() attempts
to remap memory regions.

Reported-by: default avatarAmit Lazar <abasarlaz@hotmail.com>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-Id: <20200322192258.14039-1-peter.maydell@linaro.org>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent ce05fa0f

target/ppc/timebase_helper.c

+26 −14
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#include "exec/helper-proto.h"

#include "exec/exec-all.h"

#include "qemu/log.h"

#include "qemu/main-loop.h"



/*****************************************************************************/

/* SPR accesses */
@@ -167,14 +168,20 @@ target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn) 
        raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,

                               POWERPC_EXCP_INVAL |

                               POWERPC_EXCP_INVAL_INVAL, GETPC());

    } else if (unlikely(ppc_dcr_read(env->dcr_env,

                                     (uint32_t)dcrn, &val) != 0)) {

    } else {

        int ret;



        qemu_mutex_lock_iothread();

        ret = ppc_dcr_read(env->dcr_env, (uint32_t)dcrn, &val);

        qemu_mutex_unlock_iothread();

        if (unlikely(ret != 0)) {

            qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",

                          (uint32_t)dcrn, (uint32_t)dcrn);

            raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,

                                   POWERPC_EXCP_INVAL |

                                   POWERPC_EXCP_PRIV_REG, GETPC());

        }

    }

    return val;

}
@@ -185,8 +192,12 @@ void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val) 
        raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,

                               POWERPC_EXCP_INVAL |

                               POWERPC_EXCP_INVAL_INVAL, GETPC());

    } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,

                                      (uint32_t)val) != 0)) {

    } else {

        int ret;

        qemu_mutex_lock_iothread();

        ret = ppc_dcr_write(env->dcr_env, (uint32_t)dcrn, (uint32_t)val);

        qemu_mutex_unlock_iothread();

        if (unlikely(ret != 0)) {

            qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",

                          (uint32_t)dcrn, (uint32_t)dcrn);

            raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
@@ -194,3 +205,4 @@ void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val) 
                                   POWERPC_EXCP_PRIV_REG, GETPC());

        }

    }

}