Commit 22ffad31 authored by Tom Musta's avatar Tom Musta Committed by Alexander Graf
Browse files

target-ppc: Implement mulldo with TCG



Optimize mulldo by using the muls2_i64 operation rather than a helper.  Eliminate
the obsolete helper code.

Signed-off-by: default avatarTom Musta <tommusta@gmail.com>
Suggested-by: default avatarRichard Henderson <rth@twiddle.net>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 26977876
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+0 −1
Original line number Diff line number Diff line
@@ -28,7 +28,6 @@ DEF_HELPER_2(icbi, void, env, tl)
DEF_HELPER_5(lscbx, tl, env, tl, i32, i32, i32)

#if defined(TARGET_PPC64)
DEF_HELPER_3(mulldo, i64, env, i64, i64)
DEF_HELPER_4(divdeu, i64, env, i64, i64, i32)
DEF_HELPER_4(divde, i64, env, i64, i64, i32)
#endif
+0 −27
Original line number Diff line number Diff line
@@ -24,33 +24,6 @@
#include "helper_regs.h"
/*****************************************************************************/
/* Fixed point operations helpers */
#if defined(TARGET_PPC64)

uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2)
{
    int64_t th;
    uint64_t tl;

    muls64(&tl, (uint64_t *)&th, arg1, arg2);

    /* th should either contain all 1 bits or all 0 bits and should
     * match the sign bit of tl; otherwise we have overflowed. */

    if ((int64_t)tl < 0) {
        if (likely(th == -1LL)) {
            env->ov = 0;
        } else {
            env->so = env->ov = 1;
        }
    } else if (likely(th == 0LL)) {
        env->ov = 0;
    } else {
        env->so = env->ov = 1;
    }

    return (int64_t)tl;
}
#endif

target_ulong helper_divweu(CPUPPCState *env, target_ulong ra, target_ulong rb,
                           uint32_t oe)
+14 −2
Original line number Diff line number Diff line
@@ -1215,8 +1215,20 @@ static void gen_mulld(DisasContext *ctx)
/* mulldo  mulldo. */
static void gen_mulldo(DisasContext *ctx)
{
    gen_helper_mulldo(cpu_gpr[rD(ctx->opcode)], cpu_env,
                      cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
    TCGv_i64 t0 = tcg_temp_new_i64();
    TCGv_i64 t1 = tcg_temp_new_i64();

    tcg_gen_muls2_i64(t0, t1, cpu_gpr[rA(ctx->opcode)],
                      cpu_gpr[rB(ctx->opcode)]);
    tcg_gen_mov_i64(cpu_gpr[rD(ctx->opcode)], t0);

    tcg_gen_sari_i64(t0, t0, 63);
    tcg_gen_setcond_i64(TCG_COND_NE, cpu_ov, t0, t1);
    tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);

    tcg_temp_free_i64(t0);
    tcg_temp_free_i64(t1);

    if (unlikely(Rc(ctx->opcode) != 0)) {
        gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
    }