Commit 217f1b4a authored by Haozhong Zhang's avatar Haozhong Zhang Committed by Eduardo Habkost
Browse files

target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg



It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
be set before some features (e.g. VMX and LMCE) can be used, which is
usually done by the firmware. This patch adds a fw_cfg file
"etc/msr_feature_control" which contains the advised value of
MSR_IA32_FEATURE_CONTROL and can be used by guest firmware (e.g. SeaBIOS).

Suggested-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarHaozhong Zhang <haozhong.zhang@intel.com>
Reviewed-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarEduardo Habkost <ehabkost@redhat.com>
parent 87f8b626
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+29 −0
Original line number Diff line number Diff line
@@ -1166,6 +1166,34 @@ void pc_cpus_init(PCMachineState *pcms)
    smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
}

static void pc_build_feature_control_file(PCMachineState *pcms)
{
    X86CPU *cpu = X86_CPU(pcms->possible_cpus->cpus[0].cpu);
    CPUX86State *env = &cpu->env;
    uint32_t unused, ecx, edx;
    uint64_t feature_control_bits = 0;
    uint64_t *val;

    cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
    if (ecx & CPUID_EXT_VMX) {
        feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
    }

    if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
        (CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
        (env->mcg_cap & MCG_LMCE_P)) {
        feature_control_bits |= FEATURE_CONTROL_LMCE;
    }

    if (!feature_control_bits) {
        return;
    }

    val = g_malloc(sizeof(*val));
    *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
    fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
}

static
void pc_machine_done(Notifier *notifier, void *data)
{
@@ -1193,6 +1221,7 @@ void pc_machine_done(Notifier *notifier, void *data)
    acpi_setup();
    if (pcms->fw_cfg) {
        pc_build_smbios(pcms->fw_cfg);
        pc_build_feature_control_file(pcms);
    }
}

+4 −0
Original line number Diff line number Diff line
@@ -332,6 +332,10 @@
#define MSR_TSC_ADJUST                  0x0000003b
#define MSR_IA32_TSCDEADLINE            0x6e0

#define FEATURE_CONTROL_LOCKED                    (1<<0)
#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
#define FEATURE_CONTROL_LMCE                      (1<<20)

#define MSR_P6_PERFCTR0                 0xc1

#define MSR_IA32_SMBASE                 0x9e