Commit 20f3e863 authored by Leonid Bloch's avatar Leonid Bloch Committed by Jason Wang
Browse files

e1000: Cosmetic and alignment fixes 



This fixes some alignment and cosmetic issues. The changes are made
in order that the following patches in this series will look like
integral parts of the code surrounding them, while conforming to the
coding style. Although some changes in unrelated areas are also made.

Signed-off-by: default avatarLeonid Bloch <leonid.bloch@ravellosystems.com>
Signed-off-by: default avatarDmitry Fleytman <dmitry.fleytman@ravellosystems.com>
Signed-off-by: default avatarJason Wang <jasowang@redhat.com>
parent ecc804ca

hw/net/e1000.c

+88 −78
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ typedef struct E1000State_st { 
    } tx;



    struct {

        uint32_t val_in;	// shifted in from guest driver

        uint32_t val_in;    /* shifted in from guest driver */

        uint16_t bitnum_in;

        uint16_t bitnum_out;

        uint16_t reading;
@@ -510,17 +510,19 @@ set_eecd(E1000State *s, int index, uint32_t val) 


    s->eecd_state.old_eecd = val & (E1000_EECD_SK | E1000_EECD_CS |

            E1000_EECD_DI|E1000_EECD_FWE_MASK|E1000_EECD_REQ);

    if (!(E1000_EECD_CS & val))			// CS inactive; nothing to do

    if (!(E1000_EECD_CS & val)) {            /* CS inactive; nothing to do */

        return;

    if (E1000_EECD_CS & (val ^ oldval)) {	// CS rise edge; reset state

    }

    if (E1000_EECD_CS & (val ^ oldval)) {    /* CS rise edge; reset state */

        s->eecd_state.val_in = 0;

        s->eecd_state.bitnum_in = 0;

        s->eecd_state.bitnum_out = 0;

        s->eecd_state.reading = 0;

    }

    if (!(E1000_EECD_SK & (val ^ oldval)))	// no clock edge

    if (!(E1000_EECD_SK & (val ^ oldval))) {    /* no clock edge */

        return;

    if (!(E1000_EECD_SK & val)) {		// falling edge

    }

    if (!(E1000_EECD_SK & val)) {               /* falling edge */

        s->eecd_state.bitnum_out++;

        return;

    }
@@ -621,12 +623,13 @@ xmit_seg(E1000State *s) 
        css = tp->ipcss;

        DBGOUT(TXSUM, "frames %d size %d ipcss %d\n",

               frames, tp->size, css);

        if (tp->ip) {		// IPv4

        if (tp->ip) {    /* IPv4 */

            stw_be_p(tp->data+css+2, tp->size - css);

            stw_be_p(tp->data+css+4,

                     be16_to_cpup((uint16_t *)(tp->data+css+4))+frames);

        } else			// IPv6

        } else {         /* IPv6 */

            stw_be_p(tp->data+css+4, tp->size - css);

        }

        css = tp->tucss;

        len = tp->size - css;

        DBGOUT(TXSUM, "tcp %d tucss %d len %d\n", tp->tcp, css, len);
@@ -634,8 +637,8 @@ xmit_seg(E1000State *s) 
            sofar = frames * tp->mss;

            stl_be_p(tp->data+css+4, ldl_be_p(tp->data+css+4)+sofar); /* seq */

            if (tp->paylen - sofar > tp->mss)

                tp->data[css + 13] &= ~9;		// PSH, FIN

        } else	// UDP

                tp->data[css + 13] &= ~9;    /* PSH, FIN */

        } else    /* UDP */

            stw_be_p(tp->data+css+4, len);

        if (tp->sum_needed & E1000_TXD_POPTS_TXSM) {

            unsigned int phsum;
@@ -657,8 +660,10 @@ xmit_seg(E1000State *s) 
        memmove(tp->data, tp->data + 4, 8);

        memcpy(tp->data + 8, tp->vlan_header, 4);

        e1000_send_packet(s, tp->vlan, tp->size + 4);

    } else

    } else {

        e1000_send_packet(s, tp->data, tp->size);

    }



    s->mac_reg[TPT]++;

    s->mac_reg[GPTC]++;

    n = s->mac_reg[TOTL];
@@ -679,7 +684,7 @@ process_tx_desc(E1000State *s, struct e1000_tx_desc *dp) 
    struct e1000_tx *tp = &s->tx;



    s->mit_ide |= (txd_lower & E1000_TXD_CMD_IDE);

    if (dtype == E1000_TXD_CMD_DEXT) {	// context descriptor

    if (dtype == E1000_TXD_CMD_DEXT) {    /* context descriptor */

        op = le32_to_cpu(xp->cmd_and_length);

        tp->ipcss = xp->lower_setup.ip_fields.ipcss;

        tp->ipcso = xp->lower_setup.ip_fields.ipcso;
@@ -694,7 +699,7 @@ process_tx_desc(E1000State *s, struct e1000_tx_desc *dp) 
        tp->tcp = (op & E1000_TXD_CMD_TCP) ? 1 : 0;

        tp->tse = (op & E1000_TXD_CMD_TSE) ? 1 : 0;

        tp->tso_frames = 0;

        if (tp->tucso == 0) {	// this is probably wrong

        if (tp->tucso == 0) {    /* this is probably wrong */

            DBGOUT(TXSUM, "TCP/UDP: cso 0!\n");

            tp->tucso = tp->tucss + (tp->tcp ? 16 : 6);

        }
@@ -1217,9 +1222,12 @@ static uint32_t (*macreg_readops[])(E1000State *, int) = { 
    getreg(TDLEN),    getreg(RDLEN),    getreg(RDTR),     getreg(RADV),

    getreg(TADV),     getreg(ITR),



    [TOTH] = mac_read_clr8,	[TORH] = mac_read_clr8,	[GPRC] = mac_read_clr4,

    [GPTC] = mac_read_clr4,	[TPR] = mac_read_clr4,	[TPT] = mac_read_clr4,

    [ICR] = mac_icr_read,	[EECD] = get_eecd,	[EERD] = flash_eerd_read,

    [TOTH]    = mac_read_clr8,      [TORH]    = mac_read_clr8,

    [GPRC]    = mac_read_clr4,      [GPTC]    = mac_read_clr4,

    [TPT]     = mac_read_clr4,      [TPR]     = mac_read_clr4,

    [ICR]     = mac_icr_read,       [EECD]    = get_eecd,

    [EERD]    = flash_eerd_read,



    [CRCERRS ... MPC]   = &mac_readreg,

    [RA ... RA+31]      = &mac_readreg,

    [MTA ... MTA+127]   = &mac_readreg,
@@ -1232,6 +1240,7 @@ static void (*macreg_writeops[])(E1000State *, int, uint32_t) = { 
    putreg(PBA),      putreg(EERD),     putreg(SWSM),     putreg(WUFC),

    putreg(TDBAL),    putreg(TDBAH),    putreg(TXDCTL),   putreg(RDBAH),

    putreg(RDBAL),    putreg(LEDCTL),   putreg(VET),



    [TDLEN]  = set_dlen,   [RDLEN]  = set_dlen,       [TCTL] = set_tctl,

    [TDT]    = set_tctl,   [MDIC]   = set_mdic,       [ICS]  = set_ics,

    [TDH]    = set_16bit,  [RDH]    = set_16bit,      [RDT]  = set_rdt,
@@ -1239,6 +1248,7 @@ static void (*macreg_writeops[])(E1000State *, int, uint32_t) = { 
    [EECD]   = set_eecd,   [RCTL]   = set_rx_control, [CTRL] = set_ctrl,

    [RDTR]   = set_16bit,  [RADV]   = set_16bit,      [TADV] = set_16bit,

    [ITR]    = set_16bit,



    [RA ... RA+31]      = &mac_writereg,

    [MTA ... MTA+127]   = &mac_writereg,

    [VFTA ... VFTA+127] = &mac_writereg,

hw/net/e1000_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -158,7 +158,7 @@ 
#define E1000_PHY_CTRL     0x00F10  /* PHY Control Register in CSR */

#define FEXTNVM_SW_CONFIG  0x0001

#define E1000_PBA      0x01000  /* Packet Buffer Allocation - RW */

#define E1000_PBS      0x01008  /* Packet Buffer Size */

#define E1000_PBS      0x01008  /* Packet Buffer Size - RW */

#define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */

#define E1000_FLASH_UPDATES 1000

#define E1000_EEARBC   0x01024  /* EEPROM Auto Read Bus Control */