Commit 20c20318 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20160512' into staging 



queued 2.7 patches

# gpg: Signature made Fri 13 May 2016 01:08:20 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"

* remotes/rth/tags/pull-tcg-20160512: (39 commits)
  cpu-exec: Clean up 'interrupt_request' reloading in cpu_handle_interrupt()
  cpu-exec: Remove unused 'x86_cpu' and 'env' from cpu_exec()
  cpu-exec: Move TB execution stuff out of cpu_exec()
  cpu-exec: Move interrupt handling out of cpu_exec()
  cpu-exec: Move exception handling out of cpu_exec()
  cpu-exec: Move halt handling out of cpu_exec()
  cpu-exec: Remove relic orphaned comment
  tcg: Remove needless CPUState::current_tb
  cpu-exec: Move TB chaining into tb_find_fast()
  tcg: Rework tb_invalidated_flag
  tcg: Clean up from 'next_tb'
  cpu-exec: elide more icount code if CONFIG_USER_ONLY
  tcg: reorganize tb_find_physical loop
  tcg: code_bitmap and code_write_count are not used by user-mode emulation
  tcg: Allow goto_tb to any target PC in user mode
  tcg: Clean up direct block chaining safety checks
  tcg: Clean up tb_jmp_unlink()
  tcg: Extract removing of jumps to TB from tb_phys_invalidate()
  tcg: Rename tb_jmp_remove() to tb_remove_from_jmp_list()
  tcg: Clarify thread safety check in tb_add_jump()
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents f68419ee 8b1fe3f4

cpu-exec-common.c

+0 −2
Original line number Diff line number Diff line
@@ -68,7 +68,6 @@ void cpu_reloading_memory_map(void) 


void cpu_loop_exit(CPUState *cpu)

{

    cpu->current_tb = NULL;

    siglongjmp(cpu->jmp_env, 1);

}
@@ -77,6 +76,5 @@ void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc) 
    if (pc) {

        cpu_restore_state(cpu, pc);

    }

    cpu->current_tb = NULL;

    siglongjmp(cpu->jmp_env, 1);

}

cpu-exec.c

+279 −240
Original line number Diff line number Diff line
@@ -136,7 +136,9 @@ static void init_delay_params(SyncClocks *sc, const CPUState *cpu) 
static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)

{

    CPUArchState *env = cpu->env_ptr;

    uintptr_t next_tb;

    uintptr_t ret;

    TranslationBlock *last_tb;

    int tb_exit;

    uint8_t *tb_ptr = itb->tc_ptr;



    qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
@@ -160,118 +162,125 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) 
#endif /* DEBUG_DISAS */



    cpu->can_do_io = !use_icount;

    next_tb = tcg_qemu_tb_exec(env, tb_ptr);

    ret = tcg_qemu_tb_exec(env, tb_ptr);

    cpu->can_do_io = 1;

    trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),

                       next_tb & TB_EXIT_MASK);

    last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);

    tb_exit = ret & TB_EXIT_MASK;

    trace_exec_tb_exit(last_tb, tb_exit);



    if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {

    if (tb_exit > TB_EXIT_IDX1) {

        /* We didn't start executing this TB (eg because the instruction

         * counter hit zero); we must restore the guest PC to the address

         * of the start of the TB.

         */

        CPUClass *cc = CPU_GET_CLASS(cpu);

        TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);

        qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,

        qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,

                               "Stopped execution of TB chain before %p ["

                               TARGET_FMT_lx "] %s\n",

                               itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));

                               last_tb->tc_ptr, last_tb->pc,

                               lookup_symbol(last_tb->pc));

        if (cc->synchronize_from_tb) {

            cc->synchronize_from_tb(cpu, tb);

            cc->synchronize_from_tb(cpu, last_tb);

        } else {

            assert(cc->set_pc);

            cc->set_pc(cpu, tb->pc);

            cc->set_pc(cpu, last_tb->pc);

        }

    }

    if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {

    if (tb_exit == TB_EXIT_REQUESTED) {

        /* We were asked to stop executing TBs (probably a pending

         * interrupt. We've now stopped, so clear the flag.

         */

        cpu->tcg_exit_req = 0;

    }

    return next_tb;

    return ret;

}



#ifndef CONFIG_USER_ONLY

/* Execute the code without caching the generated code. An interpreter

   could be used if available. */

static void cpu_exec_nocache(CPUState *cpu, int max_cycles,

                             TranslationBlock *orig_tb, bool ignore_icount)

{

    TranslationBlock *tb;

    bool old_tb_flushed;



    /* Should never happen.

       We only end up here when an existing TB is too long.  */

    if (max_cycles > CF_COUNT_MASK)

        max_cycles = CF_COUNT_MASK;



    old_tb_flushed = cpu->tb_flushed;

    cpu->tb_flushed = false;

    tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,

                     max_cycles | CF_NOCACHE

                         | (ignore_icount ? CF_IGNORE_ICOUNT : 0));

    tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;

    cpu->current_tb = tb;

    tb->orig_tb = cpu->tb_flushed ? NULL : orig_tb;

    cpu->tb_flushed |= old_tb_flushed;

    /* execute the generated code */

    trace_exec_tb_nocache(tb, tb->pc);

    cpu_tb_exec(cpu, tb);

    cpu->current_tb = NULL;

    tb_phys_invalidate(tb, -1);

    tb_free(tb);

}

#endif



static TranslationBlock *tb_find_physical(CPUState *cpu,

                                          target_ulong pc,

                                          target_ulong cs_base,

                                          uint64_t flags)

                                          uint32_t flags)

{

    CPUArchState *env = (CPUArchState *)cpu->env_ptr;

    TranslationBlock *tb, **ptb1;

    TranslationBlock *tb, **tb_hash_head, **ptb1;

    unsigned int h;

    tb_page_addr_t phys_pc, phys_page1;

    target_ulong virt_page2;



    tcg_ctx.tb_ctx.tb_invalidated_flag = 0;



    /* find translated block using physical mappings */

    phys_pc = get_page_addr_code(env, pc);

    phys_page1 = phys_pc & TARGET_PAGE_MASK;

    h = tb_phys_hash_func(phys_pc);

    ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];

    for(;;) {



    /* Start at head of the hash entry */

    ptb1 = tb_hash_head = &tcg_ctx.tb_ctx.tb_phys_hash[h];

    tb = *ptb1;

        if (!tb) {

            return NULL;

        }



    while (tb) {

        if (tb->pc == pc &&

            tb->page_addr[0] == phys_page1 &&

            tb->cs_base == cs_base &&

            tb->flags == flags) {

            /* check next page if needed */

            if (tb->page_addr[1] != -1) {

                tb_page_addr_t phys_page2;



                virt_page2 = (pc & TARGET_PAGE_MASK) +

            if (tb->page_addr[1] == -1) {

                /* done, we have a match */

                break;

            } else {

                /* check next page if needed */

                target_ulong virt_page2 = (pc & TARGET_PAGE_MASK) +

                                          TARGET_PAGE_SIZE;

                phys_page2 = get_page_addr_code(env, virt_page2);

                tb_page_addr_t phys_page2 = get_page_addr_code(env, virt_page2);



                if (tb->page_addr[1] == phys_page2) {

                    break;

                }

            } else {

                break;

            }

        }



        ptb1 = &tb->phys_hash_next;

        tb = *ptb1;

    }



    if (tb) {

        /* Move the TB to the head of the list */

        *ptb1 = tb->phys_hash_next;

    tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];

    tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;

        tb->phys_hash_next = *tb_hash_head;

        *tb_hash_head = tb;

    }

    return tb;

}



static TranslationBlock *tb_find_slow(CPUState *cpu,

                                      target_ulong pc,

                                      target_ulong cs_base,

                                      uint64_t flags)

                                      uint32_t flags)

{

    TranslationBlock *tb;
@@ -309,134 +318,131 @@ found: 
    return tb;

}



static inline TranslationBlock *tb_find_fast(CPUState *cpu)

static inline TranslationBlock *tb_find_fast(CPUState *cpu,

                                             TranslationBlock **last_tb,

                                             int tb_exit)

{

    CPUArchState *env = (CPUArchState *)cpu->env_ptr;

    TranslationBlock *tb;

    target_ulong cs_base, pc;

    int flags;

    uint32_t flags;



    /* we record a subset of the CPU state. It will

       always be the same before a given translated block

       is executed. */

    cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);

    tb_lock();

    tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];

    if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||

                 tb->flags != flags)) {

        tb = tb_find_slow(cpu, pc, cs_base, flags);

    }

    return tb;

}



static void cpu_handle_debug_exception(CPUState *cpu)

{

    CPUClass *cc = CPU_GET_CLASS(cpu);

    CPUWatchpoint *wp;



    if (!cpu->watchpoint_hit) {

        QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {

            wp->flags &= ~BP_WATCHPOINT_HIT;

    if (cpu->tb_flushed) {

        /* Ensure that no TB jump will be modified as the

         * translation buffer has been flushed.

         */

        *last_tb = NULL;

        cpu->tb_flushed = false;

    }

    /* See if we can patch the calling TB. */

    if (*last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {

        tb_add_jump(*last_tb, tb_exit, tb);

    }



    cc->debug_excp_handler(cpu);

    tb_unlock();

    return tb;

}



/* main execution loop */



int cpu_exec(CPUState *cpu)

static inline bool cpu_handle_halt(CPUState *cpu)

{

    CPUClass *cc = CPU_GET_CLASS(cpu);

#ifdef TARGET_I386

    X86CPU *x86_cpu = X86_CPU(cpu);

    CPUArchState *env = &x86_cpu->env;

#endif

    int ret, interrupt_request;

    TranslationBlock *tb;

    uintptr_t next_tb;

    SyncClocks sc;



    /* replay_interrupt may need current_cpu */

    current_cpu = cpu;



    if (cpu->halted) {

#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)

        if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)

            && replay_interrupt()) {

            X86CPU *x86_cpu = X86_CPU(cpu);

            apic_poll_irq(x86_cpu->apic_state);

            cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);

        }

#endif

        if (!cpu_has_work(cpu)) {

            current_cpu = NULL;

            return EXCP_HALTED;

            return true;

        }



        cpu->halted = 0;

    }



    atomic_mb_set(&tcg_current_cpu, cpu);

    rcu_read_lock();



    if (unlikely(atomic_mb_read(&exit_request))) {

        cpu->exit_request = 1;

    return false;

}



    cc->cpu_exec_enter(cpu);

static inline void cpu_handle_debug_exception(CPUState *cpu)

{

    CPUClass *cc = CPU_GET_CLASS(cpu);

    CPUWatchpoint *wp;



    /* Calculate difference between guest clock and host clock.

     * This delay includes the delay of the last cycle, so

     * what we have to do is sleep until it is 0. As for the

     * advance/delay we gain here, we try to fix it next time.

     */

    init_delay_params(&sc, cpu);

    if (!cpu->watchpoint_hit) {

        QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {

            wp->flags &= ~BP_WATCHPOINT_HIT;

        }

    }



    /* prepare setjmp context for exception handling */

    for(;;) {

        if (sigsetjmp(cpu->jmp_env, 0) == 0) {

            /* if an exception is pending, we execute it here */

    cc->debug_excp_handler(cpu);

}



static inline bool cpu_handle_exception(CPUState *cpu, int *ret)

{

    if (cpu->exception_index >= 0) {

        if (cpu->exception_index >= EXCP_INTERRUPT) {

            /* exit request from the cpu execution loop */

                    ret = cpu->exception_index;

                    if (ret == EXCP_DEBUG) {

            *ret = cpu->exception_index;

            if (*ret == EXCP_DEBUG) {

                cpu_handle_debug_exception(cpu);

            }

            cpu->exception_index = -1;

                    break;

            return true;

        } else {

#if defined(CONFIG_USER_ONLY)

            /* if user mode only, we simulate a fake exception

               which will be handled outside the cpu execution

               loop */

#if defined(TARGET_I386)

            CPUClass *cc = CPU_GET_CLASS(cpu);

            cc->do_interrupt(cpu);

#endif

                    ret = cpu->exception_index;

            *ret = cpu->exception_index;

            cpu->exception_index = -1;

                    break;

            return true;

#else

            if (replay_exception()) {

                CPUClass *cc = CPU_GET_CLASS(cpu);

                cc->do_interrupt(cpu);

                cpu->exception_index = -1;

            } else if (!replay_has_interrupt()) {

                /* give a chance to iothread in replay mode */

                        ret = EXCP_INTERRUPT;

                        break;

                *ret = EXCP_INTERRUPT;

                return true;

            }

#endif

        }

#ifndef CONFIG_USER_ONLY

    } else if (replay_has_exception()

               && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {

        /* try to cause an exception pending in the log */

                cpu_exec_nocache(cpu, 1, tb_find_fast(cpu), true);

                ret = -1;

                break;

        TranslationBlock *last_tb = NULL; /* Avoid chaining TBs */

        cpu_exec_nocache(cpu, 1, tb_find_fast(cpu, &last_tb, 0), true);

        *ret = -1;

        return true;

#endif

    }



            next_tb = 0; /* force lookup of first TB */

            for(;;) {

                interrupt_request = cpu->interrupt_request;

    return false;

}



static inline void cpu_handle_interrupt(CPUState *cpu,

                                        TranslationBlock **last_tb)

{

    CPUClass *cc = CPU_GET_CLASS(cpu);

    int interrupt_request = cpu->interrupt_request;



    if (unlikely(interrupt_request)) {

        if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {

            /* Mask out external interrupts for this step. */
@@ -447,8 +453,7 @@ int cpu_exec(CPUState *cpu) 
            cpu->exception_index = EXCP_DEBUG;

            cpu_loop_exit(cpu);

        }

                    if (replay_mode == REPLAY_MODE_PLAY

                        && !replay_has_interrupt()) {

        if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {

            /* Do nothing */

        } else if (interrupt_request & CPU_INTERRUPT_HALT) {

            replay_interrupt();
@@ -459,6 +464,8 @@ int cpu_exec(CPUState *cpu) 
        }

#if defined(TARGET_I386)

        else if (interrupt_request & CPU_INTERRUPT_INIT) {

            X86CPU *x86_cpu = X86_CPU(cpu);

            CPUArchState *env = &x86_cpu->env;

            replay_interrupt();

            cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);

            do_cpu_init(x86_cpu);
@@ -479,51 +486,41 @@ int cpu_exec(CPUState *cpu) 
        else {

            replay_interrupt();

            if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {

                            next_tb = 0;

                *last_tb = NULL;

            }

            /* The target hook may have updated the 'cpu->interrupt_request';

             * reload the 'interrupt_request' value */

            interrupt_request = cpu->interrupt_request;

        }

                    /* Don't use the cached interrupt_request value,

                       do_interrupt may have updated the EXITTB flag. */

                    if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {

        if (interrupt_request & CPU_INTERRUPT_EXITTB) {

            cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;

            /* ensure that no TB jump will be modified as

               the program flow was changed */

                        next_tb = 0;

            *last_tb = NULL;

        }

    }

                if (unlikely(cpu->exit_request

                             || replay_has_interrupt())) {

    if (unlikely(cpu->exit_request || replay_has_interrupt())) {

        cpu->exit_request = 0;

        cpu->exception_index = EXCP_INTERRUPT;

        cpu_loop_exit(cpu);

    }

                tb_lock();

                tb = tb_find_fast(cpu);

                /* Note: we do it here to avoid a gcc bug on Mac OS X when

                   doing it in tb_find_slow */

                if (tcg_ctx.tb_ctx.tb_invalidated_flag) {

                    /* as some TB could have been invalidated because

                       of memory exceptions while generating the code, we

                       must recompute the hash index here */

                    next_tb = 0;

                    tcg_ctx.tb_ctx.tb_invalidated_flag = 0;

                }

                /* see if we can patch the calling TB. When the TB

                   spans two pages, we cannot safely do a direct

                   jump. */

                if (next_tb != 0 && tb->page_addr[1] == -1

                    && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {

                    tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),

                                next_tb & TB_EXIT_MASK, tb);

}

                tb_unlock();

                if (likely(!cpu->exit_request)) {



static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,

                                    TranslationBlock **last_tb, int *tb_exit,

                                    SyncClocks *sc)

{

    uintptr_t ret;



    if (unlikely(cpu->exit_request)) {

        return;

    }



    trace_exec_tb(tb, tb->pc);

                    /* execute the generated code */

                    cpu->current_tb = tb;

                    next_tb = cpu_tb_exec(cpu, tb);

                    cpu->current_tb = NULL;

                    switch (next_tb & TB_EXIT_MASK) {

    ret = cpu_tb_exec(cpu, tb);

    *last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);

    *tb_exit = ret & TB_EXIT_MASK;

    switch (*tb_exit) {

    case TB_EXIT_REQUESTED:

        /* Something asked us to stop executing

         * chained TBs; just continue round the main
@@ -536,11 +533,14 @@ int cpu_exec(CPUState *cpu) 
         * or cpu->interrupt_request.

         */

        smp_rmb();

                        next_tb = 0;

        *last_tb = NULL;

        break;

    case TB_EXIT_ICOUNT_EXPIRED:

    {

        /* Instruction counter expired.  */

#ifdef CONFIG_USER_ONLY

        abort();

#else

        int insns_left = cpu->icount_decr.u32;

        if (cpu->icount_extra && insns_left >= 0) {

            /* Refill decrementer and continue execution.  */
@@ -551,25 +551,72 @@ int cpu_exec(CPUState *cpu) 
        } else {

            if (insns_left > 0) {

                /* Execute remaining instructions.  */

                                tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);

                                cpu_exec_nocache(cpu, insns_left, tb, false);

                                align_clocks(&sc, cpu);

                cpu_exec_nocache(cpu, insns_left, *last_tb, false);

                align_clocks(sc, cpu);

            }

            cpu->exception_index = EXCP_INTERRUPT;

                            next_tb = 0;

            *last_tb = NULL;

            cpu_loop_exit(cpu);

        }

        break;

#endif

    }

    default:

        break;

    }

}



/* main execution loop */



int cpu_exec(CPUState *cpu)

{

    CPUClass *cc = CPU_GET_CLASS(cpu);

    int ret;

    SyncClocks sc;



    /* replay_interrupt may need current_cpu */

    current_cpu = cpu;



    if (cpu_handle_halt(cpu)) {

        return EXCP_HALTED;

    }



    atomic_mb_set(&tcg_current_cpu, cpu);

    rcu_read_lock();



    if (unlikely(atomic_mb_read(&exit_request))) {

        cpu->exit_request = 1;

    }



    cc->cpu_exec_enter(cpu);



    /* Calculate difference between guest clock and host clock.

     * This delay includes the delay of the last cycle, so

     * what we have to do is sleep until it is 0. As for the

     * advance/delay we gain here, we try to fix it next time.

     */

    init_delay_params(&sc, cpu);



    for(;;) {

        TranslationBlock *tb, *last_tb;

        int tb_exit = 0;



        /* prepare setjmp context for exception handling */

        if (sigsetjmp(cpu->jmp_env, 0) == 0) {

            /* if an exception is pending, we execute it here */

            if (cpu_handle_exception(cpu, &ret)) {

                break;

            }



            last_tb = NULL; /* forget the last executed TB after exception */

            cpu->tb_flushed = false; /* reset before first TB lookup */

            for(;;) {

                cpu_handle_interrupt(cpu, &last_tb);

                tb = tb_find_fast(cpu, &last_tb, tb_exit);

                cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);

                /* Try to align the host and virtual clocks

                   if the guest is in advance */

                align_clocks(&sc, cpu);

                /* reset soft MMU for next block (it can currently

                   only be set by a memory fault) */

            } /* for(;;) */

        } else {

#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
@@ -579,18 +626,10 @@ int cpu_exec(CPUState *cpu) 
             * Newer versions of gcc would complain about this code (-Wclobbered). */

            cpu = current_cpu;

            cc = CPU_GET_CLASS(cpu);

#ifdef TARGET_I386

            x86_cpu = X86_CPU(cpu);

            env = &x86_cpu->env;

#endif

#else /* buggy compiler */

            /* Assert that the compiler does not smash local variables. */

            g_assert(cpu == current_cpu);

            g_assert(cc == CPU_GET_CLASS(cpu));

#ifdef TARGET_I386

            g_assert(x86_cpu == X86_CPU(cpu));

            g_assert(env == &x86_cpu->env);

#endif

#endif /* buggy compiler */

            cpu->can_do_io = 1;

            tb_lock_reset();

cputlb.c

+0 −13
Original line number Diff line number Diff line
@@ -76,10 +76,6 @@ void tlb_flush(CPUState *cpu, int flush_global) 


    tlb_debug("(%d)\n", flush_global);



    /* must reset current TB so that interrupts cannot modify the

       links while we are modifying them */

    cpu->current_tb = NULL;



    memset(env->tlb_table, -1, sizeof(env->tlb_table));

    memset(env->tlb_v_table, -1, sizeof(env->tlb_v_table));

    memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache));
@@ -95,9 +91,6 @@ static inline void v_tlb_flush_by_mmuidx(CPUState *cpu, va_list argp) 
    CPUArchState *env = cpu->env_ptr;



    tlb_debug("start\n");

    /* must reset current TB so that interrupts cannot modify the

       links while we are modifying them */

    cpu->current_tb = NULL;



    for (;;) {

        int mmu_idx = va_arg(argp, int);
@@ -152,9 +145,6 @@ void tlb_flush_page(CPUState *cpu, target_ulong addr) 
        tlb_flush(cpu, 1);

        return;

    }

    /* must reset current TB so that interrupts cannot modify the

       links while we are modifying them */

    cpu->current_tb = NULL;



    addr &= TARGET_PAGE_MASK;

    i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
@@ -193,9 +183,6 @@ void tlb_flush_page_by_mmuidx(CPUState *cpu, target_ulong addr, ...) 
        va_end(argp);

        return;

    }

    /* must reset current TB so that interrupts cannot modify the

       links while we are modifying them */

    cpu->current_tb = NULL;



    addr &= TARGET_PAGE_MASK;

    i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

exec.c

+1 −1
Original line number Diff line number Diff line
@@ -2087,7 +2087,7 @@ static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags) 
    target_ulong pc, cs_base;

    target_ulong vaddr;

    CPUWatchpoint *wp;

    int cpu_flags;

    uint32_t cpu_flags;



    if (cpu->watchpoint_hit) {

        /* We re-entered the check after replacing the TB. Now raise

hw/i386/kvmvapic.c

+1 −2
Original line number Diff line number Diff line
@@ -397,7 +397,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) 
    uint32_t imm32;

    target_ulong current_pc = 0;

    target_ulong current_cs_base = 0;

    int current_flags = 0;

    uint32_t current_flags = 0;



    if (smp_cpus == 1) {

        handlers = &s->rom_state.up;
@@ -446,7 +446,6 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) 
    resume_all_vcpus();



    if (!kvm_enabled()) {

        cs->current_tb = NULL;

        tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1);

        cpu_resume_from_signal(cs, NULL);

    }