Loading target-arm/translate.c +1 −2 Original line number Diff line number Diff line Loading @@ -11209,8 +11209,7 @@ static bool insn_crosses_page(CPUARMState *env, DisasContext *s) return false; } /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. */ /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb) { ARMCPU *cpu = arm_env_get_cpu(env); Loading target-i386/translate.c +1 −2 Original line number Diff line number Diff line Loading @@ -7878,8 +7878,7 @@ void tcg_x86_init(void) helper_lock_init(); } /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. */ /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUX86State *env, TranslationBlock *tb) { X86CPU *cpu = x86_env_get_cpu(env); Loading target-unicore32/translate.c +1 −2 Original line number Diff line number Diff line Loading @@ -1860,8 +1860,7 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) } } /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. */ /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUUniCore32State *env, TranslationBlock *tb) { UniCore32CPU *cpu = uc32_env_get_cpu(env); Loading tcg/tcg.c +1 −2 Original line number Diff line number Diff line Loading @@ -1576,8 +1576,7 @@ static void tcg_liveness_analysis(TCGContext *s) /* dummy liveness analysis */ static void tcg_liveness_analysis(TCGContext *s) { int nb_ops; nb_ops = s->gen_opc_ptr - s->gen_opc_buf; int nb_ops = s->gen_next_op_idx; s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); Loading Loading
target-arm/translate.c +1 −2 Original line number Diff line number Diff line Loading @@ -11209,8 +11209,7 @@ static bool insn_crosses_page(CPUARMState *env, DisasContext *s) return false; } /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. */ /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb) { ARMCPU *cpu = arm_env_get_cpu(env); Loading
target-i386/translate.c +1 −2 Original line number Diff line number Diff line Loading @@ -7878,8 +7878,7 @@ void tcg_x86_init(void) helper_lock_init(); } /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. */ /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUX86State *env, TranslationBlock *tb) { X86CPU *cpu = x86_env_get_cpu(env); Loading
target-unicore32/translate.c +1 −2 Original line number Diff line number Diff line Loading @@ -1860,8 +1860,7 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) } } /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. */ /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUUniCore32State *env, TranslationBlock *tb) { UniCore32CPU *cpu = uc32_env_get_cpu(env); Loading
tcg/tcg.c +1 −2 Original line number Diff line number Diff line Loading @@ -1576,8 +1576,7 @@ static void tcg_liveness_analysis(TCGContext *s) /* dummy liveness analysis */ static void tcg_liveness_analysis(TCGContext *s) { int nb_ops; nb_ops = s->gen_opc_ptr - s->gen_opc_buf; int nb_ops = s->gen_next_op_idx; s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); Loading