Unverified Commit 1f447aec authored by Hesham Almatary's avatar Hesham Almatary Committed by Palmer Dabbelt
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RISC-V: Check PMP during Page Table Walks 



The PMP should be checked when doing a page table walk, and report access
fault exception if the to-be-read PTE failed the PMP check.

Suggested-by: default avatarJonathan Behrens <fintelia@gmail.com>
Signed-off-by: default avatarHesham Almatary <Hesham.Almatary@cl.cam.ac.uk>
Reviewed-by: default avatarPalmer Dabbelt <palmer@sifive.com>
Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
parent cc0fdb29

target/riscv/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ enum { 
#define PRIV_VERSION_1_09_1 0x00010901

#define PRIV_VERSION_1_10_0 0x00011000



#define TRANSLATE_PMP_FAIL 2

#define TRANSLATE_FAIL 1

#define TRANSLATE_SUCCESS 0

#define MMU_USER_IDX 3

target/riscv/cpu_helper.c

+9 −1
Original line number Diff line number Diff line
@@ -230,6 +230,12 @@ restart: 


        /* check that physical address of PTE is legal */

        target_ulong pte_addr = base + idx * ptesize;



        if (riscv_feature(env, RISCV_FEATURE_PMP) &&

            !pmp_hart_has_privs(env, pte_addr, sizeof(target_ulong),

            1 << MMU_DATA_LOAD, PRV_S)) {

            return TRANSLATE_PMP_FAIL;

        }

#if defined(TARGET_RISCV32)

        target_ulong pte = ldl_phys(cs->as, pte_addr);

#elif defined(TARGET_RISCV64)
@@ -448,8 +454,10 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 
        (ret == TRANSLATE_SUCCESS) &&

        !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type,

        mode)) {

        ret = TRANSLATE_PMP_FAIL;

    }

    if (ret == TRANSLATE_PMP_FAIL) {

        pmp_violation = true;

        ret = TRANSLATE_FAIL;

    }

    if (ret == TRANSLATE_SUCCESS) {

        tlb_set_page(cs, address & TARGET_PAGE_MASK, pa & TARGET_PAGE_MASK,