Commit 1e11a139 authored by Keqian Zhu's avatar Keqian Zhu Committed by Peter Maydell
Browse files

bugfix: Use gicr_typer in arm_gicv3_icc_reset 



The KVM_VGIC_ATTR macro expect the second parameter as gicr_typer,
of which high 32bit is constructed by mp_affinity. For most case,
the high 32bit of mp_affinity is zero, so it will always access the
ICC_CTLR_EL1 of CPU0.

Signed-off-by: default avatarKeqian Zhu <zhukeqian1@huawei.com>
Message-id: 20200413091552.62748-2-zhukeqian1@huawei.com
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent c8aeef3a

hw/intc/arm_gicv3_kvm.c

+1 −3
Original line number Diff line number Diff line
@@ -658,13 +658,11 @@ static void kvm_arm_gicv3_get(GICv3State *s) 


static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri)

{

    ARMCPU *cpu;

    GICv3State *s;

    GICv3CPUState *c;



    c = (GICv3CPUState *)env->gicv3state;

    s = c->gic;

    cpu = ARM_CPU(c->cpu);



    c->icc_pmr_el1 = 0;

    c->icc_bpr[GICV3_G0] = GIC_MIN_BPR;
@@ -681,7 +679,7 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) 


    /* Initialize to actual HW supported configuration */

    kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS,

                      KVM_VGIC_ATTR(ICC_CTLR_EL1, cpu->mp_affinity),

                      KVM_VGIC_ATTR(ICC_CTLR_EL1, c->gicr_typer),

                      &c->icc_ctlr_el1[GICV3_NS], false, &error_abort);



    c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS];