Commit 1e0c7e55 authored by Anton Blanchard's avatar Anton Blanchard Committed by Alexander Graf
Browse files

target-ppc: USE LPCR_ILE to control exception endian on POWER7 



On POWER7, LPCR_ILE is used to control what endian guests take
their exceptions in so use it instead of MSR_ILE.

Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Reviewed-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 7770b6f7

target-ppc/cpu.h

+2 −0
Original line number Diff line number Diff line
@@ -453,6 +453,8 @@ struct ppc_slb_t { 
#define MSR_RI   1  /* Recoverable interrupt                        1        */

#define MSR_LE   0  /* Little-endian mode                           1 hflags */



#define LPCR_ILE (1 << (63-38))



#define msr_sf   ((env->msr >> MSR_SF)   & 1)

#define msr_isf  ((env->msr >> MSR_ISF)  & 1)

#define msr_shv  ((env->msr >> MSR_SHV)  & 1)

target-ppc/excp_helper.c

+10 −0
Original line number Diff line number Diff line
@@ -611,9 +611,19 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) 
        tlb_flush(env, 1);

    }



#ifdef TARGET_PPC64

    if (excp_model == POWERPC_EXCP_POWER7) {

        if (env->spr[SPR_LPCR] & LPCR_ILE) {

            new_msr |= (target_ulong)1 << MSR_LE;

        }

    } else if (msr_ile) {

        new_msr |= (target_ulong)1 << MSR_LE;

    }

#else

    if (msr_ile) {

        new_msr |= (target_ulong)1 << MSR_LE;

    }

#endif



    /* Jump to handler */

    vector = env->excp_vectors[excp];