Commit 1d8ad165 authored by Yang Zhong's avatar Yang Zhong Committed by Paolo Bonzini
Browse files

target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline 



Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific
tcg code.

Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent db573d2c

target/i386/cpu.h

+18 −3
Original line number Diff line number Diff line
@@ -1594,7 +1594,6 @@ void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int, 
/* cc_helper.c */

extern const uint8_t parity_table[256];

uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);

void update_fp_status(CPUX86State *env);



static inline uint32_t cpu_compute_eflags(CPUX86State *env)

{
@@ -1643,8 +1642,24 @@ static inline int32_t x86_get_a20_mask(CPUX86State *env) 
}



/* fpu_helper.c */

void cpu_set_mxcsr(CPUX86State *env, uint32_t val);

void cpu_set_fpuc(CPUX86State *env, uint16_t val);

void update_fp_status(CPUX86State *env);

void update_mxcsr_status(CPUX86State *env);



static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)

{

    env->mxcsr = mxcsr;

    if (tcg_enabled()) {

        update_mxcsr_status(env);

    }

}



static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)

{

     env->fpuc = fpuc;

     if (tcg_enabled()) {

        update_fp_status(env);

     }

}



/* mem_helper.c */

void helper_lock_init(void);

target/i386/fpu_helper.c

+2 −9
Original line number Diff line number Diff line
@@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask) 
#define SSE_RC_CHOP         0x6000

#define SSE_FZ              0x8000



void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)

void update_mxcsr_status(CPUX86State *env)

{

    uint32_t mxcsr = env->mxcsr;

    int rnd_type;



    env->mxcsr = mxcsr;



    /* set rounding mode */

    switch (mxcsr & SSE_RC_MASK) {

    default:
@@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) 
    set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status);

}



void cpu_set_fpuc(CPUX86State *env, uint16_t val)

{

    env->fpuc = val;

    update_fp_status(env);

}



void helper_ldmxcsr(CPUX86State *env, uint32_t val)

{

    cpu_set_mxcsr(env, val);

target/i386/machine.c

+4 −1
Original line number Diff line number Diff line
@@ -280,7 +280,10 @@ static int cpu_post_load(void *opaque, int version_id) 
    for(i = 0; i < 8; i++) {

        env->fptags[i] = (env->fptag_vmstate >> i) & 1;

    }

    if (tcg_enabled()) {

        update_fp_status(env);

        update_mxcsr_status(env);

    }



    cpu_breakpoint_remove_all(cs, BP_CPU);

    cpu_watchpoint_remove_all(cs, BP_CPU);