Commit 1d512a65 authored Nov 13, 2015 by Paolo Bonzini

microblaze: avoid "naked" qemu_log



Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

parent 79e8ed35

target-microblaze/helper.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -128,7 +128,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
		switch (cs->exception_index) {
		case EXCP_HW_EXCP:
		if (!(env->pvr.regs[0] & PVR0_USE_EXC_MASK)) {
		qemu_log("Exception raised on system without exceptions!\n");
		qemu_log_mask(LOG_GUEST_ERROR, "Exception raised on system without exceptions!\n");
		return;
		}

target-microblaze/mmu.c

+10 −10

Original line number	Diff line number	Diff line
		@@ -60,7 +60,7 @@ static void mmu_change_pid(CPUMBState *env, unsigned int newpid)
		uint32_t t;

		if (newpid & ~0xff)
		qemu_log("Illegal rpid=%x\n", newpid);
		qemu_log_mask(LOG_GUEST_ERROR, "Illegal rpid=%x\n", newpid);

		for (i = 0; i < ARRAY_SIZE(mmu->rams[RAM_TAG]); i++) {
		/* Lookup and decode. */
		@@ -121,7 +121,7 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
		t0 &= 0x3;

		if (tlb_zsel > mmu->c_mmu_zones) {
		qemu_log("tlb zone select out of range! %d\n", tlb_zsel);
		qemu_log_mask(LOG_GUEST_ERROR, "tlb zone select out of range! %d\n", tlb_zsel);
		t0 = 1; /* Ignore. */
		}

		@@ -183,7 +183,7 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
		uint32_t r;

		if (env->mmu.c_mmu < 2 \|\| !env->mmu.c_mmu_tlb_access) {
		qemu_log("MMU access on MMU-less system\n");
		qemu_log_mask(LOG_GUEST_ERROR, "MMU access on MMU-less system\n");
		return 0;
		}

		@@ -192,7 +192,7 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
		case MMU_R_TLBLO:
		case MMU_R_TLBHI:
		if (!(env->mmu.c_mmu_tlb_access & 1)) {
		qemu_log("Invalid access to MMU reg %d\n", rn);
		qemu_log_mask(LOG_GUEST_ERROR, "Invalid access to MMU reg %d\n", rn);
		return 0;
		}

		@@ -204,7 +204,7 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
		case MMU_R_PID:
		case MMU_R_ZPR:
		if (!(env->mmu.c_mmu_tlb_access & 1)) {
		qemu_log("Invalid access to MMU reg %d\n", rn);
		qemu_log_mask(LOG_GUEST_ERROR, "Invalid access to MMU reg %d\n", rn);
		return 0;
		}
		r = env->mmu.regs[rn];
		@@ -224,7 +224,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
		D(qemu_log("%s rn=%d=%x old=%x\n", __func__, rn, v, env->mmu.regs[rn]));

		if (env->mmu.c_mmu < 2 \|\| !env->mmu.c_mmu_tlb_access) {
		qemu_log("MMU access on MMU-less system\n");
		qemu_log_mask(LOG_GUEST_ERROR, "MMU access on MMU-less system\n");
		return;
		}

		@@ -235,7 +235,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
		i = env->mmu.regs[MMU_R_TLBX] & 0xff;
		if (rn == MMU_R_TLBHI) {
		if (i < 3 && !(v & TLB_VALID) && qemu_loglevel_mask(~0))
		qemu_log("invalidating index %x at pc=%x\n",
		qemu_log_mask(LOG_GUEST_ERROR, "invalidating index %x at pc=%x\n",
		i, env->sregs[SR_PC]);
		env->mmu.tids[i] = env->mmu.regs[MMU_R_PID] & 0xff;
		mmu_flush_idx(env, i);
		@@ -246,7 +246,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
		break;
		case MMU_R_ZPR:
		if (env->mmu.c_mmu_tlb_access <= 1) {
		qemu_log("Invalid access to MMU reg %d\n", rn);
		qemu_log_mask(LOG_GUEST_ERROR, "Invalid access to MMU reg %d\n", rn);
		return;
		}

		@@ -259,7 +259,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
		break;
		case MMU_R_PID:
		if (env->mmu.c_mmu_tlb_access <= 1) {
		qemu_log("Invalid access to MMU reg %d\n", rn);
		qemu_log_mask(LOG_GUEST_ERROR, "Invalid access to MMU reg %d\n", rn);
		return;
		}

		@@ -274,7 +274,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
		int hit;

		if (env->mmu.c_mmu_tlb_access <= 1) {
		qemu_log("Invalid access to MMU reg %d\n", rn);
		qemu_log_mask(LOG_GUEST_ERROR, "Invalid access to MMU reg %d\n", rn);
		return;
		}

target-microblaze/op_helper.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -55,7 +55,7 @@ void helper_put(uint32_t id, uint32_t ctrl, uint32_t data)
		int nonblock = ctrl & STREAM_NONBLOCK;
		int exception = ctrl & STREAM_EXCEPTION;

		qemu_log("Unhandled stream put to stream-id=%d data=%x %s%s%s%s%s\n",
		qemu_log_mask(LOG_UNIMP, "Unhandled stream put to stream-id=%d data=%x %s%s%s%s%s\n",
		id, data,
		test ? "t" : "",
		nonblock ? "n" : "",
		@@ -72,7 +72,7 @@ uint32_t helper_get(uint32_t id, uint32_t ctrl)
		int nonblock = ctrl & STREAM_NONBLOCK;
		int exception = ctrl & STREAM_EXCEPTION;

		qemu_log("Unhandled stream get from stream-id=%d %s%s%s%s%s\n",
		qemu_log_mask(LOG_UNIMP, "Unhandled stream get from stream-id=%d %s%s%s%s%s\n",
		id,
		test ? "t" : "",
		nonblock ? "n" : "",
		@@ -465,7 +465,7 @@ void helper_memalign(CPUMBState *env, uint32_t addr, uint32_t dr, uint32_t wr,
		void helper_stackprot(CPUMBState *env, uint32_t addr)
		{
		if (addr < env->slr \|\| addr > env->shr) {
		qemu_log("Stack protector violation at %x %x %x\n",
		qemu_log_mask(CPU_LOG_INT, "Stack protector violation at %x %x %x\n",
		addr, env->slr, env->shr);
		env->sregs[SR_EAR] = addr;
		env->sregs[SR_ESR] = ESR_EC_STACKPROT;

target-microblaze/translate.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1516,7 +1516,7 @@ static void dec_null(DisasContext *dc)
		t_gen_raise_exception(dc, EXCP_HW_EXCP);
		return;
		}
		qemu_log ("unknown insn pc=%x opc=%x\n", dc->pc, dc->opcode);
		qemu_log_mask(LOG_GUEST_ERROR, "unknown insn pc=%x opc=%x\n", dc->pc, dc->opcode);
		dc->abort_at_next_insn = 1;
		}