Commit 1c53b06c authored by Cédric Le Goater's avatar Cédric Le Goater Committed by David Gibson
Browse files

spapr: extend the sPAPR IRQ backend for XICS migration 



Introduce a new sPAPR IRQ handler to handle resend after migration
when the machine is using a KVM XICS interrupt controller model.

Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 1a937ad7

hw/ppc/spapr.c

+5 −8
Original line number Diff line number Diff line
@@ -1730,14 +1730,6 @@ static int spapr_post_load(void *opaque, int version_id) 
        return err;

    }



    if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {

        CPUState *cs;

        CPU_FOREACH(cs) {

            PowerPCCPU *cpu = POWERPC_CPU(cs);

            icp_resend(ICP(cpu->intc));

        }

    }



    /* In earlier versions, there was no separate qdev for the PAPR

     * RTC, so the RTC offset was stored directly in sPAPREnvironment.

     * So when migrating from those versions, poke the incoming offset
@@ -1758,6 +1750,11 @@ static int spapr_post_load(void *opaque, int version_id) 
        }

    }



    err = spapr_irq_post_load(spapr, version_id);

    if (err) {

        return err;

    }



    return err;

}

hw/ppc/spapr_irq.c

+27 −0
Original line number Diff line number Diff line
@@ -197,6 +197,18 @@ static Object *spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr, 
    return icp_create(cpu, spapr->icp_type, XICS_FABRIC(spapr), errp);

}



static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id)

{

    if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {

        CPUState *cs;

        CPU_FOREACH(cs) {

            PowerPCCPU *cpu = POWERPC_CPU(cs);

            icp_resend(ICP(cpu->intc));

        }

    }

    return 0;

}



#define SPAPR_IRQ_XICS_NR_IRQS     0x1000

#define SPAPR_IRQ_XICS_NR_MSIS     \

    (XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI)
@@ -212,6 +224,7 @@ sPAPRIrq spapr_irq_xics = { 
    .print_info  = spapr_irq_print_info_xics,

    .dt_populate = spapr_dt_xics,

    .cpu_intc_create = spapr_irq_cpu_intc_create_xics,

    .post_load   = spapr_irq_post_load_xics,

};



/*
@@ -295,6 +308,11 @@ static Object *spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr, 
    return xive_tctx_create(cpu, XIVE_ROUTER(spapr->xive), errp);

}



static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_id)

{

    return 0;

}



/*

 * XIVE uses the full IRQ number space. Set it to 8K to be compatible

 * with XICS.
@@ -314,6 +332,7 @@ sPAPRIrq spapr_irq_xive = { 
    .print_info  = spapr_irq_print_info_xive,

    .dt_populate = spapr_dt_xive,

    .cpu_intc_create = spapr_irq_cpu_intc_create_xive,

    .post_load   = spapr_irq_post_load_xive,

};



/*
@@ -352,6 +371,13 @@ qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq) 
    return smc->irq->qirq(spapr, irq);

}



int spapr_irq_post_load(sPAPRMachineState *spapr, int version_id)

{

    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);



    return smc->irq->post_load(spapr, version_id);

}



/*

 * XICS legacy routines - to deprecate one day

 */
@@ -420,4 +446,5 @@ sPAPRIrq spapr_irq_xics_legacy = { 
    .print_info  = spapr_irq_print_info_xics,

    .dt_populate = spapr_dt_xics,

    .cpu_intc_create = spapr_irq_cpu_intc_create_xics,

    .post_load   = spapr_irq_post_load_xics,

};

include/hw/ppc/spapr_irq.h

+2 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ typedef struct sPAPRIrq { 
                        void *fdt, uint32_t phandle);

    Object *(*cpu_intc_create)(sPAPRMachineState *spapr, Object *cpu,

                               Error **errp);

    int (*post_load)(sPAPRMachineState *spapr, int version_id);

} sPAPRIrq;



extern sPAPRIrq spapr_irq_xics;
@@ -53,6 +54,7 @@ void spapr_irq_init(sPAPRMachineState *spapr, Error **errp); 
int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);

void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num);

qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq);

int spapr_irq_post_load(sPAPRMachineState *spapr, int version_id);



/*

 * XICS legacy routines