Commit 1a381811 authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-s390-20140515' into staging



tcg/s390 updates

# gpg: Signature made Thu 15 May 2014 17:24:40 BST using RSA key ID 4DD0279B
# gpg: Can't check signature: public key not found

* remotes/rth/tags/pull-tcg-s390-20140515:
  tcg-s390: Implement direct chaining of TBs
  tcg-s390: Don't force -march=z990
  tcg-s390: Improve setcond
  tcg-s390: Allow immediate operands to add2 and sub2
  tcg-s390: Implement tcg_register_jit
  tcg-s390: Use more risbg in the tlb sequence
  tcg-s390: Move ldst helpers out of line
  tcg-s390: Convert to new ldst opcodes
  tcg-s390: Integrate endianness into TCGMemOp
  tcg-s390: Convert to TCGMemOp
  tcg-s390: Fix off-by-one in wraparound andi

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 16a91899 a10c64e0
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+2 −2
Original line number Diff line number Diff line
@@ -1137,11 +1137,11 @@ case "$cpu" in
           CPU_CFLAGS="-m64 -mcpu=ultrasparc"
           ;;
    s390)
           CPU_CFLAGS="-m31 -march=z990"
           CPU_CFLAGS="-m31"
           LDFLAGS="-m31 $LDFLAGS"
           ;;
    s390x)
           CPU_CFLAGS="-m64 -march=z990"
           CPU_CFLAGS="-m64"
           LDFLAGS="-m64 $LDFLAGS"
           ;;
    i386)
+9 −0
Original line number Diff line number Diff line
@@ -131,6 +131,7 @@ static inline void tlb_flush(CPUState *cpu, int flush_global)
#if defined(__arm__) || defined(_ARCH_PPC) \
    || defined(__x86_64__) || defined(__i386__) \
    || defined(__sparc__) || defined(__aarch64__) \
    || defined(__s390x__) \
    || defined(CONFIG_TCG_INTERPRETER)
#define USE_DIRECT_JUMP
#endif
@@ -232,6 +233,14 @@ static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
    stl_le_p((void*)jmp_addr, addr - (jmp_addr + 4));
    /* no need to flush icache explicitly */
}
#elif defined(__s390x__)
static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
{
    /* patch the branch destination */
    intptr_t disp = addr - (jmp_addr - 2);
    stl_be_p((void*)jmp_addr, disp / 2);
    /* no need to flush icache explicitly */
}
#elif defined(__aarch64__)
void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
#define tb_set_jmp_target1 aarch64_tb_set_jmp_target
+443 −309

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@@ -100,7 +100,7 @@ typedef enum TCGReg {
#define TCG_TARGET_HAS_muluh_i64        0
#define TCG_TARGET_HAS_mulsh_i64        0

#define TCG_TARGET_HAS_new_ldst         0
#define TCG_TARGET_HAS_new_ldst         1

extern bool tcg_target_deposit_valid(int ofs, int len);
#define TCG_TARGET_deposit_i32_valid  tcg_target_deposit_valid