Commit 19bef037 authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-rc2' into staging



RISC-V Fixes for 4.2-rc2

This contains a handful of patches that I'd like to target for 4.2:

* OpenSBI upgrade to 0.5
* Increase in the flash size of the virt board.
* A non-functional cleanup.
* A cleanup to our MIP handling that avoids atomics.

This passes "make check" and boots OpenEmbedded for me.

# gpg: Signature made Thu 14 Nov 2019 18:39:27 GMT
# gpg:                using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
# gpg:                issuer "palmer@dabbelt.com"
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
# gpg:                 aka "Palmer Dabbelt <palmer@sifive.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41

* remotes/palmer/tags/riscv-for-master-4.2-rc2:
  riscv/virt: Increase flash size
  opensbi: Upgrade from v0.4 to v0.5
  target/riscv: Remove atomic accesses to MIP CSR
  remove unnecessary ifdef TARGET_RISCV64

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents e10bf1fe 6911fde4
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@@ -62,7 +62,7 @@ static const struct MemmapEntry {
    [VIRT_PLIC] =        {  0xc000000,     0x4000000 },
    [VIRT_UART0] =       { 0x10000000,         0x100 },
    [VIRT_VIRTIO] =      { 0x10001000,        0x1000 },
    [VIRT_FLASH] =       { 0x20000000,     0x2000000 },
    [VIRT_FLASH] =       { 0x20000000,     0x4000000 },
    [VIRT_DRAM] =        { 0x80000000,           0x0 },
    [VIRT_PCIE_MMIO] =   { 0x40000000,    0x40000000 },
    [VIRT_PCIE_PIO] =    { 0x03000000,    0x00010000 },
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opensbi @ be92da28

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Subproject commit ce228ee0919deb9957192d723eecc8aaae2697c6
Subproject commit be92da280d87c38a2e0adc5d3f43bab7b5468f09
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