Loading target/xtensa/cpu.c +1 −1 Original line number Diff line number Diff line Loading @@ -60,7 +60,7 @@ static void xtensa_cpu_reset(CPUState *s) xcc->parent_reset(s); env->exception_taken = 0; env->pc = env->config->exception_vector[EXC_RESET]; env->pc = env->config->exception_vector[EXC_RESET0 + env->static_vectors]; env->sregs[LITBASE] &= ~1; env->sregs[PS] = xtensa_option_enabled(env->config, XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10; Loading target/xtensa/cpu.h +9 −1 Original line number Diff line number Diff line Loading @@ -209,7 +209,8 @@ enum { enum { /* Static vectors */ EXC_RESET, EXC_RESET0, EXC_RESET1, EXC_MEMORY_ERROR, /* Dynamic vectors */ Loading Loading @@ -373,6 +374,7 @@ typedef struct CPUXtensaState { int64_t halt_clock; int exception_taken; unsigned static_vectors; /* Watchpoints for DBREAK registers */ struct CPUWatchpoint *cpu_watchpoint[MAX_NDBREAK]; Loading Loading @@ -461,6 +463,12 @@ void reset_mmu(CPUXtensaState *env); void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env); void debug_exception_env(CPUXtensaState *new_env, uint32_t cause); static inline void xtensa_select_static_vectors(CPUXtensaState *env, unsigned n) { assert(n < 2); env->static_vectors = n; } #define XTENSA_OPTION_BIT(opt) (((uint64_t)1) << (opt)) #define XTENSA_OPTION_ALL (~(uint64_t)0) Loading target/xtensa/overlay_tool.h +10 −1 Original line number Diff line number Diff line Loading @@ -47,6 +47,14 @@ #define XCHAL_VECBASE_RESET_VADDR 0 #endif #ifndef XCHAL_RESET_VECTOR0_VADDR #define XCHAL_RESET_VECTOR0_VADDR XCHAL_RESET_VECTOR_VADDR #endif #ifndef XCHAL_RESET_VECTOR1_VADDR #define XCHAL_RESET_VECTOR1_VADDR XCHAL_RESET_VECTOR_VADDR #endif #ifndef XCHAL_HW_MIN_VERSION #define XCHAL_HW_MIN_VERSION 0 #endif Loading Loading @@ -133,7 +141,8 @@ #endif #define EXCEPTION_VECTORS { \ [EXC_RESET] = XCHAL_RESET_VECTOR_VADDR, \ [EXC_RESET0] = XCHAL_RESET_VECTOR0_VADDR, \ [EXC_RESET1] = XCHAL_RESET_VECTOR1_VADDR, \ WINDOW_VECTORS \ [EXC_KERNEL] = XCHAL_KERNEL_VECTOR_VADDR, \ [EXC_USER] = XCHAL_USER_VECTOR_VADDR, \ Loading Loading
target/xtensa/cpu.c +1 −1 Original line number Diff line number Diff line Loading @@ -60,7 +60,7 @@ static void xtensa_cpu_reset(CPUState *s) xcc->parent_reset(s); env->exception_taken = 0; env->pc = env->config->exception_vector[EXC_RESET]; env->pc = env->config->exception_vector[EXC_RESET0 + env->static_vectors]; env->sregs[LITBASE] &= ~1; env->sregs[PS] = xtensa_option_enabled(env->config, XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10; Loading
target/xtensa/cpu.h +9 −1 Original line number Diff line number Diff line Loading @@ -209,7 +209,8 @@ enum { enum { /* Static vectors */ EXC_RESET, EXC_RESET0, EXC_RESET1, EXC_MEMORY_ERROR, /* Dynamic vectors */ Loading Loading @@ -373,6 +374,7 @@ typedef struct CPUXtensaState { int64_t halt_clock; int exception_taken; unsigned static_vectors; /* Watchpoints for DBREAK registers */ struct CPUWatchpoint *cpu_watchpoint[MAX_NDBREAK]; Loading Loading @@ -461,6 +463,12 @@ void reset_mmu(CPUXtensaState *env); void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env); void debug_exception_env(CPUXtensaState *new_env, uint32_t cause); static inline void xtensa_select_static_vectors(CPUXtensaState *env, unsigned n) { assert(n < 2); env->static_vectors = n; } #define XTENSA_OPTION_BIT(opt) (((uint64_t)1) << (opt)) #define XTENSA_OPTION_ALL (~(uint64_t)0) Loading
target/xtensa/overlay_tool.h +10 −1 Original line number Diff line number Diff line Loading @@ -47,6 +47,14 @@ #define XCHAL_VECBASE_RESET_VADDR 0 #endif #ifndef XCHAL_RESET_VECTOR0_VADDR #define XCHAL_RESET_VECTOR0_VADDR XCHAL_RESET_VECTOR_VADDR #endif #ifndef XCHAL_RESET_VECTOR1_VADDR #define XCHAL_RESET_VECTOR1_VADDR XCHAL_RESET_VECTOR_VADDR #endif #ifndef XCHAL_HW_MIN_VERSION #define XCHAL_HW_MIN_VERSION 0 #endif Loading Loading @@ -133,7 +141,8 @@ #endif #define EXCEPTION_VECTORS { \ [EXC_RESET] = XCHAL_RESET_VECTOR_VADDR, \ [EXC_RESET0] = XCHAL_RESET_VECTOR0_VADDR, \ [EXC_RESET1] = XCHAL_RESET_VECTOR1_VADDR, \ WINDOW_VECTORS \ [EXC_KERNEL] = XCHAL_KERNEL_VECTOR_VADDR, \ [EXC_USER] = XCHAL_USER_VECTOR_VADDR, \ Loading