Commit 16a14cdf authored by Laurent Vivier's avatar Laurent Vivier
Browse files

target/m68k: use insn_pc to generate instruction fault address 



Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-Id: <20180104012913.30763-5-laurent@vivier.eu>
parent ef59760b

target/m68k/translate.c

+20 −20
Original line number Diff line number Diff line
@@ -1509,12 +1509,12 @@ DISAS_INSN(dbcc) 


DISAS_INSN(undef_mac)

{

    gen_exception(s, s->pc - 2, EXCP_LINEA);

    gen_exception(s, s->insn_pc, EXCP_LINEA);

}



DISAS_INSN(undef_fpu)

{

    gen_exception(s, s->pc - 2, EXCP_LINEF);

    gen_exception(s, s->insn_pc, EXCP_LINEF);

}



DISAS_INSN(undef)
@@ -1523,8 +1523,8 @@ DISAS_INSN(undef) 
       for the 680x0 series, as well as those that are implemented

       but actually illegal for CPU32 or pre-68020.  */

    qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x",

                  insn, s->pc - 2);

    gen_exception(s, s->pc - 2, EXCP_UNSUPPORTED);

                  insn, s->insn_pc);

    gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED);

}



DISAS_INSN(mulw)
@@ -2583,7 +2583,7 @@ DISAS_INSN(swap) 


DISAS_INSN(bkpt)

{

    gen_exception(s, s->pc - 2, EXCP_DEBUG);

    gen_exception(s, s->insn_pc, EXCP_DEBUG);

}



DISAS_INSN(pea)
@@ -2636,7 +2636,7 @@ DISAS_INSN(pulse) 


DISAS_INSN(illegal)

{

    gen_exception(s, s->pc - 2, EXCP_ILLEGAL);

    gen_exception(s, s->insn_pc, EXCP_ILLEGAL);

}



/* ??? This should be atomic.  */
@@ -2666,7 +2666,7 @@ DISAS_INSN(mull) 


    if (ext & 0x400) {

        if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) {

            gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED);

            gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED);

            return;

        }
@@ -4240,7 +4240,7 @@ DISAS_INSN(move_from_sr) 
    TCGv sr;



    if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68000)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    sr = gen_get_sr(s);
@@ -4250,7 +4250,7 @@ DISAS_INSN(move_from_sr) 
DISAS_INSN(move_to_sr)

{

    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    gen_set_sr(env, s, insn, 0);
@@ -4260,7 +4260,7 @@ DISAS_INSN(move_to_sr) 
DISAS_INSN(move_from_usp)

{

    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    tcg_gen_ld_i32(AREG(insn, 0), cpu_env,
@@ -4270,7 +4270,7 @@ DISAS_INSN(move_from_usp) 
DISAS_INSN(move_to_usp)

{

    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    tcg_gen_st_i32(AREG(insn, 0), cpu_env,
@@ -4287,7 +4287,7 @@ DISAS_INSN(stop) 
    uint16_t ext;



    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }
@@ -4301,10 +4301,10 @@ DISAS_INSN(stop) 
DISAS_INSN(rte)

{

    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    gen_exception(s, s->pc - 2, EXCP_RTE);

    gen_exception(s, s->insn_pc, EXCP_RTE);

}



DISAS_INSN(movec)
@@ -4313,7 +4313,7 @@ DISAS_INSN(movec) 
    TCGv reg;



    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }
@@ -4331,7 +4331,7 @@ DISAS_INSN(movec) 
DISAS_INSN(intouch)

{

    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    /* ICache fetch.  Implement as no-op.  */
@@ -4340,7 +4340,7 @@ DISAS_INSN(intouch) 
DISAS_INSN(cpushl)

{

    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    /* Cache push/invalidate.  Implement as no-op.  */
@@ -4348,7 +4348,7 @@ DISAS_INSN(cpushl) 


DISAS_INSN(wddata)

{

    gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

    gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

}



DISAS_INSN(wdebug)
@@ -4356,7 +4356,7 @@ DISAS_INSN(wdebug) 
    M68kCPU *cpu = m68k_env_get_cpu(env);



    if (IS_USER(s)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);

        return;

    }

    /* TODO: Implement wdebug.  */
@@ -4365,7 +4365,7 @@ DISAS_INSN(wdebug) 


DISAS_INSN(trap)

{

    gen_exception(s, s->pc - 2, EXCP_TRAP0 + (insn & 0xf));

    gen_exception(s, s->insn_pc, EXCP_TRAP0 + (insn & 0xf));

}



static void gen_load_fcr(DisasContext *s, TCGv res, int reg)