Commit 168c12b0 authored by Max Filippov's avatar Max Filippov
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target/xtensa: extract core opcode translators



Move implementations of core opcodes into separate translation
functions. Introduce data structures for mapping opcode name to
translator function. Make an array of core opcode/translator structures.

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent 7f709ce7
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+24 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
#include "xtensa-isa.h"

#define NB_MMU_MODES 4

@@ -205,6 +206,8 @@ enum {
#define MEMCTL_DSNP 0x2
#define MEMCTL_IL0EN 0x1

#define MAX_INSN_LENGTH 64
#define MAX_OPCODE_ARGS 16
#define MAX_NAREG 64
#define MAX_NINTERRUPT 32
#define MAX_NLEVEL 6
@@ -330,6 +333,23 @@ typedef struct XtensaMemory {
    } location[MAX_NMEMORY];
} XtensaMemory;

typedef struct DisasContext DisasContext;
typedef void (*XtensaOpcodeOp)(DisasContext *dc, const uint32_t arg[],
                               const uint32_t par[]);

typedef struct XtensaOpcodeOps {
    const char *name;
    XtensaOpcodeOp translate;
    const uint32_t *par;
} XtensaOpcodeOps;

typedef struct XtensaOpcodeTranslators {
    unsigned num_opcodes;
    const XtensaOpcodeOps *opcode;
} XtensaOpcodeTranslators;

extern const XtensaOpcodeTranslators xtensa_core_opcodes;

struct XtensaConfig {
    const char *name;
    uint64_t options;
@@ -370,6 +390,8 @@ struct XtensaConfig {

    uint32_t configid[2];

    void *isa_internal;

    uint32_t clock_freq_khz;

    xtensa_tlb itlb;
@@ -522,6 +544,8 @@ static inline void xtensa_select_static_vectors(CPUXtensaState *env,
    env->static_vectors = n;
}
void xtensa_runstall(CPUXtensaState *env, bool runstall);
XtensaOpcodeOps *xtensa_find_opcode_ops(const XtensaOpcodeTranslators *t,
                                        const char *opcode);

#define XTENSA_OPTION_BIT(opt) (((uint64_t)1) << (opt))
#define XTENSA_OPTION_ALL (~(uint64_t)0)
+3121 −0

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