target-i386: Implement BNDMK (149b427b) · Commits · SUMMER2020 / students / proj-2021291

target-i386/translate.c

+57 −1

Original line number	Diff line number	Diff line
		@@ -71,6 +71,8 @@ static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2, cpu_cc_srcT;
		static TCGv_i32 cpu_cc_op;
		static TCGv cpu_regs[CPU_NB_REGS];
		static TCGv cpu_seg_base[6];
		static TCGv_i64 cpu_bndl[4];
		static TCGv_i64 cpu_bndu[4];
		/* local temps */
		static TCGv cpu_T0, cpu_T1;
		/* local register indexes (only used inside old micro ops) */
		@@ -7438,7 +7440,44 @@ static target_ulong disas_insn(CPUX86State env, DisasContext s,
		break;
		}
		break;
		case 0x119 ... 0x11f: /* nop (multi byte) */
		case 0x11b:
		modrm = cpu_ldub_code(env, s->pc++);
		if (s->flags & HF_MPX_EN_MASK) {
		mod = (modrm >> 6) & 3;
		reg = ((modrm >> 3) & 7) \| rex_r;
		if (mod != 3 && (prefixes & PREFIX_REPZ)) {
		/* bndmk */
		if (reg >= 4
		\|\| (prefixes & PREFIX_LOCK)
		\|\| s->aflag == MO_16) {
		goto illegal_op;
		}
		AddressParts a = gen_lea_modrm_0(env, s, modrm);
		if (a.base >= 0) {
		tcg_gen_extu_tl_i64(cpu_bndl[reg], cpu_regs[a.base]);
		if (!CODE64(s)) {
		tcg_gen_ext32u_i64(cpu_bndl[reg], cpu_bndl[reg]);
		}
		} else if (a.base == -1) {
		/* no base register has lower bound of 0 */
		tcg_gen_movi_i64(cpu_bndl[reg], 0);
		} else {
		/* rip-relative generates #ud */
		goto illegal_op;
		}
		tcg_gen_not_tl(cpu_A0, gen_lea_modrm_1(a));
		if (!CODE64(s)) {
		tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
		}
		tcg_gen_extu_tl_i64(cpu_bndu[reg], cpu_A0);
		/* bnd registers are now in-use */
		gen_set_hflag(s, HF_MPX_IU_MASK);
		break;
		}
		}
		gen_nop_modrm(env, s, modrm);
		break;
		case 0x119: case 0x11a: case 0x11c ... 0x11f: /* nop (multi byte) */
		modrm = cpu_ldub_code(env, s->pc++);
		gen_nop_modrm(env, s, modrm);
		break;
		@@ -7803,6 +7842,12 @@ void tcg_x86_init(void)
		[R_GS] = "gs_base",
		[R_SS] = "ss_base",
		};
		static const char bnd_regl_names[4][8] = {
		"bnd0_lb", "bnd1_lb", "bnd2_lb", "bnd3_lb"
		};
		static const char bnd_regu_names[4][8] = {
		"bnd0_ub", "bnd1_ub", "bnd2_ub", "bnd3_ub"
		};
		int i;

		cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
		@@ -7828,6 +7873,17 @@ void tcg_x86_init(void)
		seg_base_names[i]);
		}

		for (i = 0; i < 4; ++i) {
		cpu_bndl[i]
		= tcg_global_mem_new_i64(cpu_env,
		offsetof(CPUX86State, bnd_regs[i].lb),
		bnd_regl_names[i]);
		cpu_bndu[i]
		= tcg_global_mem_new_i64(cpu_env,
		offsetof(CPUX86State, bnd_regs[i].ub),
		bnd_regu_names[i]);
		}

		helper_lock_init();
		}