Commit 1479073b authored by Max Filippov's avatar Max Filippov
Browse files

target-xtensa: fix gdb register map construction 



Due to different gdb overlay organization between windowed/call0
configurations core import script doesn't always work correctly.
Simplify the script: always copy complete gdb register map from overlay,
count registers at core registerstion time. Update existing cores.

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent ddd44279

target-xtensa/core-dc232b.c

+1 −1
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ 
#include "core-dc232b/core-isa.h"

#include "overlay_tool.h"



static const XtensaConfig dc232b __attribute__((unused)) = {

static XtensaConfig dc232b __attribute__((unused)) = {

    .name = "dc232b",

    .gdb_regmap = {

        .num_regs = 120,

target-xtensa/core-dc233c.c

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ 
#include "core-dc233c/core-isa.h"

#include "overlay_tool.h"



static const XtensaConfig dc233c __attribute__((unused)) = {

static XtensaConfig dc233c __attribute__((unused)) = {

    .name = "dc233c",

    .gdb_regmap = {

        .num_regs = 121,

target-xtensa/core-fsf.c

+6 −1
Original line number Diff line number Diff line
@@ -33,9 +33,14 @@ 
#include "core-fsf/core-isa.h"

#include "overlay_tool.h"



static const XtensaConfig fsf __attribute__((unused)) = {

static XtensaConfig fsf __attribute__((unused)) = {

    .name = "fsf",

    .gdb_regmap = {

    /* GDB for this core is not supported currently */

        .reg = {

            XTREG_END

        },

    },

    .clock_freq_khz = 10000,

    DEFAULT_SECTIONS

};

target-xtensa/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -400,6 +400,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model); 
void xtensa_translate_init(void);

void xtensa_breakpoint_handler(CPUState *cs);

int cpu_xtensa_exec(CPUXtensaState *s);

void xtensa_finalize_config(XtensaConfig *config);

void xtensa_register_core(XtensaConfigList *node);

void check_interrupts(CPUXtensaState *s);

void xtensa_irq_init(CPUXtensaState *env);

target-xtensa/helper.c

+14 −0
Original line number Diff line number Diff line
@@ -51,6 +51,20 @@ static void xtensa_core_class_init(ObjectClass *oc, void *data) 
    cc->gdb_num_core_regs = config->gdb_regmap.num_regs;

}



void xtensa_finalize_config(XtensaConfig *config)

{

    unsigned i, n = 0;



    if (config->gdb_regmap.num_regs) {

        return;

    }



    for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) {

        n += (config->gdb_regmap.reg[i].type != 6);

    }

    config->gdb_regmap.num_regs = n;

}



void xtensa_register_core(XtensaConfigList *node)

{

    TypeInfo type = {