Commit 14646457 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by David Gibson
Browse files

ppc: Add a few more P8 PMU SPRs 



Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 1e440cbc

target-ppc/cpu.h

+7 −0
Original line number Diff line number Diff line
@@ -1564,6 +1564,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) 
#define SPR_PERF0             (0x300)

#define SPR_RCPU_MI_RBA0      (0x300)

#define SPR_MPC_MI_CTR        (0x300)

#define SPR_POWER_USIER       (0x300)

#define SPR_PERF1             (0x301)

#define SPR_RCPU_MI_RBA1      (0x301)

#define SPR_POWER_UMMCR2      (0x301)
@@ -1613,6 +1614,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) 
#define SPR_PERFF             (0x30F)

#define SPR_MPC_MD_TW         (0x30F)

#define SPR_UPERF0            (0x310)

#define SPR_POWER_SIER        (0x310)

#define SPR_UPERF1            (0x311)

#define SPR_POWER_MMCR2       (0x311)

#define SPR_UPERF2            (0x312)
@@ -1674,7 +1676,12 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) 
#define SPR_440_ITV2          (0x376)

#define SPR_440_ITV3          (0x377)

#define SPR_440_CCR1          (0x378)

#define SPR_TACR              (0x378)

#define SPR_TCSCR             (0x379)

#define SPR_CSIGR             (0x37a)

#define SPR_DCRIPR            (0x37B)

#define SPR_POWER_SPMC1       (0x37C)

#define SPR_POWER_SPMC2       (0x37D)

#define SPR_POWER_MMCRS       (0x37E)

#define SPR_PPR               (0x380)

#define SPR_750_GQR0          (0x390)

target-ppc/translate_init.c

+28 −0
Original line number Diff line number Diff line
@@ -7603,6 +7603,30 @@ static void gen_spr_power8_pmu_sup(CPUPPCState *env) 
                     SPR_NOACCESS, SPR_NOACCESS,

                     &spr_read_generic, &spr_write_generic,

                     KVM_REG_PPC_MMCRS, 0x00000000);

    spr_register_kvm(env, SPR_POWER_SIER, "SIER",

                     SPR_NOACCESS, SPR_NOACCESS,

                     &spr_read_generic, &spr_write_generic,

                     KVM_REG_PPC_SIER, 0x00000000);

    spr_register_kvm(env, SPR_POWER_SPMC1, "SPMC1",

                     SPR_NOACCESS, SPR_NOACCESS,

                     &spr_read_generic, &spr_write_generic,

                     KVM_REG_PPC_SPMC1, 0x00000000);

    spr_register_kvm(env, SPR_POWER_SPMC2, "SPMC2",

                     SPR_NOACCESS, SPR_NOACCESS,

                     &spr_read_generic, &spr_write_generic,

                     KVM_REG_PPC_SPMC2, 0x00000000);

    spr_register_kvm(env, SPR_TACR, "TACR",

                     SPR_NOACCESS, SPR_NOACCESS,

                     &spr_read_generic, &spr_write_generic,

                     KVM_REG_PPC_TACR, 0x00000000);

    spr_register_kvm(env, SPR_TCSCR, "TCSCR",

                     SPR_NOACCESS, SPR_NOACCESS,

                     &spr_read_generic, &spr_write_generic,

                     KVM_REG_PPC_TCSCR, 0x00000000);

    spr_register_kvm(env, SPR_CSIGR, "CSIGR",

                     SPR_NOACCESS, SPR_NOACCESS,

                     &spr_read_generic, &spr_write_generic,

                     KVM_REG_PPC_CSIGR, 0x00000000);

}



static void gen_spr_power8_pmu_user(CPUPPCState *env)
@@ -7611,6 +7635,10 @@ static void gen_spr_power8_pmu_user(CPUPPCState *env) 
                 &spr_read_ureg, SPR_NOACCESS,

                 &spr_read_ureg, &spr_write_ureg,

                 0x00000000);

    spr_register(env, SPR_POWER_USIER, "USIER",

                 &spr_read_generic, SPR_NOACCESS,

                 &spr_read_generic, &spr_write_generic,

                 0x00000000);

}



static void gen_spr_power5p_ear(CPUPPCState *env)