Commit 1438eff3 authored by Anton Blanchard's avatar Anton Blanchard Committed by David Gibson
Browse files

target-ppc: gdbstub: Add VSX support 



Add the XML and functions to get and set VSX registers.

Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
(fixed little-endian guests)
Signed-off-by: default avatarGreg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 95f5b540

configure

+3 −3
Original line number Diff line number Diff line
@@ -5702,20 +5702,20 @@ case "$target_name" in 
  ppc64)

    TARGET_BASE_ARCH=ppc

    TARGET_ABI_DIR=ppc

    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"

    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"

  ;;

  ppc64le)

    TARGET_ARCH=ppc64

    TARGET_BASE_ARCH=ppc

    TARGET_ABI_DIR=ppc

    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"

    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"

  ;;

  ppc64abi32)

    TARGET_ARCH=ppc64

    TARGET_BASE_ARCH=ppc

    TARGET_ABI_DIR=ppc

    echo "TARGET_ABI32=y" >> $config_target_mak

    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"

    gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"

  ;;

  sh4|sh4eb)

    TARGET_ARCH=sh4

gdb-xml/power-vsx.xml

0 → 100644
+44 −0
Original line number Diff line number Diff line 
<?xml version="1.0"?>

<!-- Copyright (C) 2008-2015 Free Software Foundation, Inc.



     Copying and distribution of this file, with or without modification,

     are permitted in any medium without royalty provided the copyright

     notice and this notice are preserved.  -->



<!-- POWER7 VSX registers that do not overlap existing FP and VMX

     registers.  -->

<!DOCTYPE feature SYSTEM "gdb-target.dtd">

<feature name="org.gnu.gdb.power.vsx">

  <reg name="vs0h" bitsize="64" type="uint64"/>

  <reg name="vs1h" bitsize="64" type="uint64"/>

  <reg name="vs2h" bitsize="64" type="uint64"/>

  <reg name="vs3h" bitsize="64" type="uint64"/>

  <reg name="vs4h" bitsize="64" type="uint64"/>

  <reg name="vs5h" bitsize="64" type="uint64"/>

  <reg name="vs6h" bitsize="64" type="uint64"/>

  <reg name="vs7h" bitsize="64" type="uint64"/>

  <reg name="vs8h" bitsize="64" type="uint64"/>

  <reg name="vs9h" bitsize="64" type="uint64"/>

  <reg name="vs10h" bitsize="64" type="uint64"/>

  <reg name="vs11h" bitsize="64" type="uint64"/>

  <reg name="vs12h" bitsize="64" type="uint64"/>

  <reg name="vs13h" bitsize="64" type="uint64"/>

  <reg name="vs14h" bitsize="64" type="uint64"/>

  <reg name="vs15h" bitsize="64" type="uint64"/>

  <reg name="vs16h" bitsize="64" type="uint64"/>

  <reg name="vs17h" bitsize="64" type="uint64"/>

  <reg name="vs18h" bitsize="64" type="uint64"/>

  <reg name="vs19h" bitsize="64" type="uint64"/>

  <reg name="vs20h" bitsize="64" type="uint64"/>

  <reg name="vs21h" bitsize="64" type="uint64"/>

  <reg name="vs22h" bitsize="64" type="uint64"/>

  <reg name="vs23h" bitsize="64" type="uint64"/>

  <reg name="vs24h" bitsize="64" type="uint64"/>

  <reg name="vs25h" bitsize="64" type="uint64"/>

  <reg name="vs26h" bitsize="64" type="uint64"/>

  <reg name="vs27h" bitsize="64" type="uint64"/>

  <reg name="vs28h" bitsize="64" type="uint64"/>

  <reg name="vs29h" bitsize="64" type="uint64"/>

  <reg name="vs30h" bitsize="64" type="uint64"/>

  <reg name="vs31h" bitsize="64" type="uint64"/>

</feature>

target-ppc/translate_init.c

+24 −0
Original line number Diff line number Diff line
@@ -8896,6 +8896,26 @@ static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n) 
    return 0;

}



static int gdb_get_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n)

{

    if (n < 32) {

        stq_p(mem_buf, env->vsr[n]);

        ppc_maybe_bswap_register(env, mem_buf, 8);

        return 8;

    }

    return 0;

}



static int gdb_set_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n)

{

    if (n < 32) {

        ppc_maybe_bswap_register(env, mem_buf, 8);

        env->vsr[n] = ldq_p(mem_buf);

        return 8;

    }

    return 0;

}



static int ppc_fixup_cpu(PowerPCCPU *cpu)

{

    CPUPPCState *env = &cpu->env;
@@ -9001,6 +9021,10 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp) 
        gdb_register_coprocessor(cs, gdb_get_spe_reg, gdb_set_spe_reg,

                                 34, "power-spe.xml", 0);

    }

    if (pcc->insns_flags2 & PPC2_VSX) {

        gdb_register_coprocessor(cs, gdb_get_vsx_reg, gdb_set_vsx_reg,

                                 32, "power-vsx.xml", 0);

    }



    qemu_init_vcpu(cs);