Commit 118d1e4f authored by Petar Jovanovic's avatar Petar Jovanovic Committed by Aurelien Jarno
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target-mips: set carry bit correctly in DSPControl register 



First we need to clear the bit and then we set the given value.
Instruction ADDSC sets the bit and instruction ADDWC uses this bit.

Signed-off-by: default avatarPetar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
parent 0ba365f4

target-mips/dsp_helper.c

+4 −3
Original line number Diff line number Diff line
@@ -54,9 +54,10 @@ static inline void set_DSPControl_overflow_flag(uint32_t flag, int position, 
    env->active_tc.DSPControl |= (target_ulong)flag << position;

}



static inline void set_DSPControl_carryflag(uint32_t flag, CPUMIPSState *env)

static inline void set_DSPControl_carryflag(bool flag, CPUMIPSState *env)

{

    env->active_tc.DSPControl |= (target_ulong)flag << 13;

    env->active_tc.DSPControl &= ~(1 << 13);

    env->active_tc.DSPControl |= flag << 13;

}



static inline uint32_t get_DSPControl_carryflag(CPUMIPSState *env)
@@ -1267,7 +1268,7 @@ SUBUH_QB(subuh_r, 1); 
target_ulong helper_addsc(target_ulong rs, target_ulong rt, CPUMIPSState *env)

{

    uint64_t temp, tempRs, tempRt;

    int32_t flag;

    bool flag;



    tempRs = (uint64_t)rs & MIPSDSP_LLO;

    tempRt = (uint64_t)rt & MIPSDSP_LLO;