Commit 118760df authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging 



acpi,pc,pci,virtio,memory bug fixes

This collects several small fixes from all over the place.
Additionally, Marcel's changes make acpi unit tests more robust.

Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Sun 09 Mar 2014 19:14:57 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  qemu: x86: ignore ioapic polarity
  pckbd: return 'keyboard enabled' on read input port command
  pam: partly fix write-only mode
  acpi-test: issue errors instead of warnings when possible
  acpi-test: retain both asl and aml files on failure
  MAINTAINERS: drop an out of date address
  Add a 'name' parameter to qemu_thread_create
  Add 'debug-threads' suboption to --name
  Rework --name to use QemuOpts
  PCIE: fix regression with coldplugged multifunction device
  memory_region_present: return false if address is not found in child MemoryRegion
  virtio-net: remove function calls from assert
  acpi-test-data: update expected files
  acpi-build: append description for non-hotplug

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents b304bf00 220c8ed5

MAINTAINERS

+0 −2
Original line number Diff line number Diff line
@@ -158,7 +158,6 @@ Guest CPU Cores (KVM): 
----------------------



Overall

M: Gleb Natapov <gleb@redhat.com>

M: Paolo Bonzini <pbonzini@redhat.com>

L: kvm@vger.kernel.org

S: Supported
@@ -184,7 +183,6 @@ F: target-s390x/kvm.c 
F: hw/intc/s390_flic.[hc]



X86

M: Gleb Natapov <gleb@redhat.com>

M: Marcelo Tosatti <mtosatti@redhat.com>

L: kvm@vger.kernel.org

S: Supported

cpus.c

+20 −5
Original line number Diff line number Diff line
@@ -1117,8 +1117,13 @@ void resume_all_vcpus(void) 
    }

}



/* For temporary buffers for forming a name */

#define VCPU_THREAD_NAME_SIZE 16



static void qemu_tcg_init_vcpu(CPUState *cpu)

{

    char thread_name[VCPU_THREAD_NAME_SIZE];



    tcg_cpu_address_space_init(cpu, cpu->as);



    /* share a single thread for all cpus with TCG */
@@ -1127,8 +1132,10 @@ static void qemu_tcg_init_vcpu(CPUState *cpu) 
        cpu->halt_cond = g_malloc0(sizeof(QemuCond));

        qemu_cond_init(cpu->halt_cond);

        tcg_halt_cond = cpu->halt_cond;

        qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,

                           QEMU_THREAD_JOINABLE);

        snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG",

                 cpu->cpu_index);

        qemu_thread_create(cpu->thread, thread_name, qemu_tcg_cpu_thread_fn,

                           cpu, QEMU_THREAD_JOINABLE);

#ifdef _WIN32

        cpu->hThread = qemu_thread_get_handle(cpu->thread);

#endif
@@ -1144,11 +1151,15 @@ static void qemu_tcg_init_vcpu(CPUState *cpu) 


static void qemu_kvm_start_vcpu(CPUState *cpu)

{

    char thread_name[VCPU_THREAD_NAME_SIZE];



    cpu->thread = g_malloc0(sizeof(QemuThread));

    cpu->halt_cond = g_malloc0(sizeof(QemuCond));

    qemu_cond_init(cpu->halt_cond);

    qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, cpu,

                       QEMU_THREAD_JOINABLE);

    snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/KVM",

             cpu->cpu_index);

    qemu_thread_create(cpu->thread, thread_name, qemu_kvm_cpu_thread_fn,

                       cpu, QEMU_THREAD_JOINABLE);

    while (!cpu->created) {

        qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);

    }
@@ -1156,10 +1167,14 @@ static void qemu_kvm_start_vcpu(CPUState *cpu) 


static void qemu_dummy_start_vcpu(CPUState *cpu)

{

    char thread_name[VCPU_THREAD_NAME_SIZE];



    cpu->thread = g_malloc0(sizeof(QemuThread));

    cpu->halt_cond = g_malloc0(sizeof(QemuCond));

    qemu_cond_init(cpu->halt_cond);

    qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, cpu,

    snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/DUMMY",

             cpu->cpu_index);

    qemu_thread_create(cpu->thread, thread_name, qemu_dummy_cpu_thread_fn, cpu,

                       QEMU_THREAD_JOINABLE);

    while (!cpu->created) {

        qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);

hw/block/dataplane/virtio-blk.c

+1 −1
Original line number Diff line number Diff line
@@ -358,7 +358,7 @@ static void start_data_plane_bh(void *opaque) 


    qemu_bh_delete(s->start_bh);

    s->start_bh = NULL;

    qemu_thread_create(&s->thread, data_plane_thread,

    qemu_thread_create(&s->thread, "data_plane", data_plane_thread,

                       s, QEMU_THREAD_JOINABLE);

}

hw/i386/acpi-build.c

+119 −24
Original line number Diff line number Diff line
@@ -643,6 +643,21 @@ static inline char acpi_get_hex(uint32_t val) 
#define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)

#define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)



#define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1)

#define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start)

#define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start)

#define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start)



#define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1)

#define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start)

#define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start)

#define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start)



#define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1)

#define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start)

#define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start)

#define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start)



#define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */

#define ACPI_SSDT_HEADER_LENGTH 36
@@ -677,6 +692,33 @@ static void patch_pcihp(int slot, uint8_t *ssdt_ptr) 
    ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;

}



static void patch_pcinohp(int slot, uint8_t *ssdt_ptr)

{

    unsigned devfn = PCI_DEVFN(slot, 0);



    ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);

    ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);

    ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot;

}



static void patch_pcivga(int slot, uint8_t *ssdt_ptr)

{

    unsigned devfn = PCI_DEVFN(slot, 0);



    ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4);

    ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn);

    ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot;

}



static void patch_pciqxl(int slot, uint8_t *ssdt_ptr)

{

    unsigned devfn = PCI_DEVFN(slot, 0);



    ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4);

    ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn);

    ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot;

}



/* Assign BSEL property to all buses.  In the future, this can be changed

 * to only assign to buses that support hotplug.

 */
@@ -737,6 +779,10 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state) 
    AcpiBuildPciBusHotplugState *parent = child->parent;

    GArray *bus_table = build_alloc_array();

    DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);

    DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX);

    DECLARE_BITMAP(slot_device_system, PCI_SLOT_MAX);

    DECLARE_BITMAP(slot_device_vga, PCI_SLOT_MAX);

    DECLARE_BITMAP(slot_device_qxl, PCI_SLOT_MAX);

    uint8_t op;

    int i;

    QObject *bsel;
@@ -764,40 +810,82 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state) 
        build_append_byte(bus_table, 0x08); /* NameOp */

        build_append_nameseg(bus_table, "BSEL");

        build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));



        memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable);

    } else {

        /* No bsel - no slots are hot-pluggable */

        memset(slot_hotplug_enable, 0x00, sizeof slot_hotplug_enable);

    }



        for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) {

    memset(slot_device_present, 0x00, sizeof slot_device_present);

    memset(slot_device_system, 0x00, sizeof slot_device_present);

    memset(slot_device_vga, 0x00, sizeof slot_device_vga);

    memset(slot_device_qxl, 0x00, sizeof slot_device_qxl);



    for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) {

        DeviceClass *dc;

        PCIDeviceClass *pc;

        PCIDevice *pdev = bus->devices[i];

        int slot = PCI_SLOT(i);



        if (!pdev) {

            continue;

        }



        set_bit(slot, slot_device_present);

        pc = PCI_DEVICE_GET_CLASS(pdev);

        dc = DEVICE_GET_CLASS(pdev);



            if (!dc->hotpluggable || pc->is_bridge) {

                int slot = PCI_SLOT(i);

        if (pc->class_id == PCI_CLASS_BRIDGE_ISA) {

            set_bit(slot, slot_device_system);

        }



        if (pc->class_id == PCI_CLASS_DISPLAY_VGA) {

            set_bit(slot, slot_device_vga);



            if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) {

                set_bit(slot, slot_device_qxl);

            }

        }



        if (!dc->hotpluggable || pc->is_bridge) {

            clear_bit(slot, slot_hotplug_enable);

        }

    }



        /* Append Device object for each slot which supports eject */

    /* Append Device object for each slot */

    for (i = 0; i < PCI_SLOT_MAX; i++) {

        bool can_eject = test_bit(i, slot_hotplug_enable);

        bool present = test_bit(i, slot_device_present);

        bool vga = test_bit(i, slot_device_vga);

        bool qxl = test_bit(i, slot_device_qxl);

        bool system = test_bit(i, slot_device_system);

        if (can_eject) {

            void *pcihp = acpi_data_push(bus_table,

                                         ACPI_PCIHP_SIZEOF);

            memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);

            patch_pcihp(i, pcihp);

            bus_hotplug_support = true;

        } else if (qxl) {

            void *pcihp = acpi_data_push(bus_table,

                                         ACPI_PCIQXL_SIZEOF);

            memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);

            patch_pciqxl(i, pcihp);

        } else if (vga) {

            void *pcihp = acpi_data_push(bus_table,

                                         ACPI_PCIVGA_SIZEOF);

            memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);

            patch_pcivga(i, pcihp);

        } else if (system) {

            /* Nothing to do: system devices are in DSDT. */

        } else if (present) {

            void *pcihp = acpi_data_push(bus_table,

                                         ACPI_PCINOHP_SIZEOF);

            memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);

            patch_pcinohp(i, pcihp);

        }

    }



    if (bsel) {

        method = build_alloc_method("DVNT", 2);



        for (i = 0; i < PCI_SLOT_MAX; i++) {
@@ -976,7 +1064,14 @@ build_ssdt(GArray *table_data, GArray *linker, 


        {

            AcpiBuildPciBusHotplugState hotplug_state;

            PCIBus *bus = find_i440fx(); /* TODO: Q35 support */

            Object *pci_host;

            PCIBus *bus = NULL;

            bool ambiguous;



            pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);

            if (!ambiguous && pci_host) {

                bus = PCI_HOST_BRIDGE(pci_host)->bus;

            }



            build_pci_bus_state_init(&hotplug_state, NULL);

hw/i386/acpi-dsdt.dsl

+5 −28
Original line number Diff line number Diff line
@@ -80,6 +80,8 @@ DefinitionBlock ( 
            Name(_HID, EisaId("PNP0A03"))

            Name(_ADR, 0x00)

            Name(_UID, 1)

//#define PX13 S0B_

//            External(PX13, DeviceObj)

        }

    }
@@ -87,34 +89,6 @@ DefinitionBlock ( 
#include "acpi-dsdt-hpet.dsl"





/****************************************************************

 * VGA

 ****************************************************************/



    Scope(\_SB.PCI0) {

        Device(VGA) {

            Name(_ADR, 0x00020000)

            OperationRegion(PCIC, PCI_Config, Zero, 0x4)

            Field(PCIC, DWordAcc, NoLock, Preserve) {

                VEND, 32

            }

            Method(_S1D, 0, NotSerialized) {

                Return (0x00)

            }

            Method(_S2D, 0, NotSerialized) {

                Return (0x00)

            }

            Method(_S3D, 0, NotSerialized) {

                If (LEqual(VEND, 0x1001b36)) {

                    Return (0x03)           // QXL

                } Else {

                    Return (0x00)

                }

            }

        }

    }





/****************************************************************

 * PIIX4 PM

 ****************************************************************/
@@ -132,6 +106,9 @@ DefinitionBlock ( 
 ****************************************************************/



    Scope(\_SB.PCI0) {



        External(ISA, DeviceObj)



        Device(ISA) {

            Name(_ADR, 0x00010000)