Commit 110b1a8c authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20181213' into staging 



target-arm queue:
 * Convert various devices from sysbus init to instance_init
 * Remove the now unused sysbus init support entirely
 * Allow AArch64 processors to boot from a kernel placed over 4GB
 * hw: arm: musicpal: drop TYPE_WM8750 in object_property_set_link()
 * versal: minor fixes to virtio-mmio instantation
 * arm: Implement the ARMv8.1-HPD extension
 * arm: Implement the ARMv8.2-AA32HPD extension
 * arm: Implement the ARMv8.1-LOR extension (as the trivial
   "no limited ordering regions provided" minimum)

# gpg: Signature made Thu 13 Dec 2018 14:52:25 GMT
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20181213: (37 commits)
  target/arm: Implement the ARMv8.1-LOR extension
  target/arm: Use arm_hcr_el2_eff more places
  target/arm: Introduce arm_hcr_el2_eff
  target/arm: Implement the ARMv8.2-AA32HPD extension
  target/arm: Implement the ARMv8.1-HPD extension
  target/arm: Tidy scr_write
  target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el
  target/arm: Add SCR_EL3 bits up to ARMv8.5
  target/arm: Add HCR_EL2 bits up to ARMv8.5
  target/arm: Move id_aa64mmfr* to ARMISARegisters
  hw/arm: versal: Correct the nr of IRQs to 192
  hw/arm: versal: Use IRQs 111 - 118 for virtio-mmio
  hw/arm: versal: Reduce number of virtio-mmio instances
  hw/arm: versal: Remove bogus virtio-mmio creation
  core/sysbus: remove the SysBusDeviceClass::init path
  xen_backend: remove xen_sysdev_init() function
  usb/tusb6010: Convert sysbus init function to realize function
  timer/puv3_ost: Convert sysbus init function to realize function
  timer/grlib_gptimer: Convert sysbus init function to realize function
  timer/etraxfs_timer: Convert sysbus init function to realize function
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 0f98c994 2d7137c1

hw/arm/boot.c

+22 −13
Original line number Diff line number Diff line
@@ -63,8 +63,10 @@ typedef enum { 
    FIXUP_TERMINATOR,   /* end of insns */

    FIXUP_BOARDID,      /* overwrite with board ID number */

    FIXUP_BOARD_SETUP,  /* overwrite with board specific setup code address */

    FIXUP_ARGPTR,       /* overwrite with pointer to kernel args */

    FIXUP_ENTRYPOINT,   /* overwrite with kernel entry point */

    FIXUP_ARGPTR_LO,    /* overwrite with pointer to kernel args */

    FIXUP_ARGPTR_HI,    /* overwrite with pointer to kernel args (high half) */

    FIXUP_ENTRYPOINT_LO, /* overwrite with kernel entry point */

    FIXUP_ENTRYPOINT_HI, /* overwrite with kernel entry point (high half) */

    FIXUP_GIC_CPU_IF,   /* overwrite with GIC CPU interface address */

    FIXUP_BOOTREG,      /* overwrite with boot register address */

    FIXUP_DSB,          /* overwrite with correct DSB insn for cpu */
@@ -83,10 +85,10 @@ static const ARMInsnFixup bootloader_aarch64[] = { 
    { 0xaa1f03e3 }, /* mov x3, xzr */

    { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */

    { 0xd61f0080 }, /* br x4      ; Jump to the kernel entry point */

    { 0, FIXUP_ARGPTR }, /* arg: .word @DTB Lower 32-bits */

    { 0 }, /* .word @DTB Higher 32-bits */

    { 0, FIXUP_ENTRYPOINT }, /* entry: .word @Kernel Entry Lower 32-bits */

    { 0 }, /* .word @Kernel Entry Higher 32-bits */

    { 0, FIXUP_ARGPTR_LO }, /* arg: .word @DTB Lower 32-bits */

    { 0, FIXUP_ARGPTR_HI}, /* .word @DTB Higher 32-bits */

    { 0, FIXUP_ENTRYPOINT_LO }, /* entry: .word @Kernel Entry Lower 32-bits */

    { 0, FIXUP_ENTRYPOINT_HI }, /* .word @Kernel Entry Higher 32-bits */

    { 0, FIXUP_TERMINATOR }

};
@@ -106,8 +108,8 @@ static const ARMInsnFixup bootloader[] = { 
    { 0xe59f2004 }, /* ldr     r2, [pc, #4] */

    { 0xe59ff004 }, /* ldr     pc, [pc, #4] */

    { 0, FIXUP_BOARDID },

    { 0, FIXUP_ARGPTR },

    { 0, FIXUP_ENTRYPOINT },

    { 0, FIXUP_ARGPTR_LO },

    { 0, FIXUP_ENTRYPOINT_LO },

    { 0, FIXUP_TERMINATOR }

};
@@ -174,8 +176,10 @@ static void write_bootloader(const char *name, hwaddr addr, 
            break;

        case FIXUP_BOARDID:

        case FIXUP_BOARD_SETUP:

        case FIXUP_ARGPTR:

        case FIXUP_ENTRYPOINT:

        case FIXUP_ARGPTR_LO:

        case FIXUP_ARGPTR_HI:

        case FIXUP_ENTRYPOINT_LO:

        case FIXUP_ENTRYPOINT_HI:

        case FIXUP_GIC_CPU_IF:

        case FIXUP_BOOTREG:

        case FIXUP_DSB:
@@ -1152,9 +1156,13 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info) 
            /* Place the DTB after the initrd in memory with alignment. */

            info->dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size,

                                           align);

            fixupcontext[FIXUP_ARGPTR] = info->dtb_start;

            fixupcontext[FIXUP_ARGPTR_LO] = info->dtb_start;

            fixupcontext[FIXUP_ARGPTR_HI] = info->dtb_start >> 32;

        } else {

            fixupcontext[FIXUP_ARGPTR] = info->loader_start + KERNEL_ARGS_ADDR;

            fixupcontext[FIXUP_ARGPTR_LO] =

                info->loader_start + KERNEL_ARGS_ADDR;

            fixupcontext[FIXUP_ARGPTR_HI] =

                (info->loader_start + KERNEL_ARGS_ADDR) >> 32;

            if (info->ram_size >= (1ULL << 32)) {

                error_report("RAM size must be less than 4GB to boot"

                             " Linux kernel using ATAGS (try passing a device tree"
@@ -1162,7 +1170,8 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info) 
                exit(1);

            }

        }

        fixupcontext[FIXUP_ENTRYPOINT] = entry;

        fixupcontext[FIXUP_ENTRYPOINT_LO] = entry;

        fixupcontext[FIXUP_ENTRYPOINT_HI] = entry >> 32;



        write_bootloader("bootloader", info->loader_start,

                         primary_loader, fixupcontext, as);

hw/arm/musicpal.c

+5 −6
Original line number Diff line number Diff line
@@ -1147,14 +1147,13 @@ static const MemoryRegionOps mv88w8618_wlan_ops = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



static int mv88w8618_wlan_init(SysBusDevice *dev)

static void mv88w8618_wlan_realize(DeviceState *dev, Error **errp)

{

    MemoryRegion *iomem = g_new(MemoryRegion, 1);



    memory_region_init_io(iomem, OBJECT(dev), &mv88w8618_wlan_ops, NULL,

                          "musicpal-wlan", MP_WLAN_SIZE);

    sysbus_init_mmio(dev, iomem);

    return 0;

    sysbus_init_mmio(SYS_BUS_DEVICE(dev), iomem);

}



/* GPIO register offsets */
@@ -1696,7 +1695,7 @@ static void musicpal_init(MachineState *machine) 
    dev = qdev_create(NULL, TYPE_MV88W8618_AUDIO);

    s = SYS_BUS_DEVICE(dev);

    object_property_set_link(OBJECT(dev), OBJECT(wm8750_dev),

                             TYPE_WM8750, NULL);

                             "wm8750", NULL);

    qdev_init_nofail(dev);

    sysbus_mmio_map(s, 0, MP_AUDIO_BASE);

    sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]);
@@ -1720,9 +1719,9 @@ DEFINE_MACHINE("musicpal", musicpal_machine_init) 


static void mv88w8618_wlan_class_init(ObjectClass *klass, void *data)

{

    SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);

    DeviceClass *dc = DEVICE_CLASS(klass);



    sdc->init = mv88w8618_wlan_init;

    dc->realize = mv88w8618_wlan_realize;

}



static const TypeInfo mv88w8618_wlan_info = {

hw/arm/xlnx-versal-virt.c

+3 −4
Original line number Diff line number Diff line
@@ -342,7 +342,7 @@ static void *versal_virt_get_dtb(const struct arm_boot_info *binfo, 
    return board->fdt;

}



#define NUM_VIRTIO_TRANSPORT 32

#define NUM_VIRTIO_TRANSPORT 8

static void create_virtio_regions(VersalVirt *s)

{

    int virtio_mmio_size = 0x200;
@@ -351,7 +351,7 @@ static void create_virtio_regions(VersalVirt *s) 
    for (i = 0; i < NUM_VIRTIO_TRANSPORT; i++) {

        char *name = g_strdup_printf("virtio%d", i);;

        hwaddr base = MM_TOP_RSVD + i * virtio_mmio_size;

        int irq = VERSAL_RSVD_HIGH_IRQ_FIRST + i;

        int irq = VERSAL_RSVD_IRQ_FIRST + i;

        MemoryRegion *mr;

        DeviceState *dev;

        qemu_irq pic_irq;
@@ -364,12 +364,11 @@ static void create_virtio_regions(VersalVirt *s) 
        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic_irq);

        mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);

        memory_region_add_subregion(&s->soc.mr_ps, base, mr);

        sysbus_create_simple("virtio-mmio", base, pic_irq);

    }



    for (i = 0; i < NUM_VIRTIO_TRANSPORT; i++) {

        hwaddr base = MM_TOP_RSVD + i * virtio_mmio_size;

        int irq = VERSAL_RSVD_HIGH_IRQ_FIRST + i;

        int irq = VERSAL_RSVD_IRQ_FIRST + i;

        char *name = g_strdup_printf("/virtio_mmio@%" PRIx64, base);



        qemu_fdt_add_subnode(s->fdt, name);

hw/block/onenand.c

+7 −9
Original line number Diff line number Diff line
@@ -772,9 +772,9 @@ static const MemoryRegionOps onenand_ops = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



static int onenand_initfn(SysBusDevice *sbd)

static void onenand_realize(DeviceState *dev, Error **errp)

{

    DeviceState *dev = DEVICE(sbd);

    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);

    OneNANDState *s = ONE_NAND(dev);

    uint32_t size = 1 << (24 + ((s->id.dev >> 4) & 7));

    void *ram;
@@ -794,14 +794,14 @@ static int onenand_initfn(SysBusDevice *sbd) 
                          0xff, size + (size >> 5));

    } else {

        if (blk_is_read_only(s->blk)) {

            error_report("Can't use a read-only drive");

            return -1;

            error_setg(errp, "Can't use a read-only drive");

            return;

        }

        blk_set_perm(s->blk, BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE,

                     BLK_PERM_ALL, &local_err);

        if (local_err) {

            error_report_err(local_err);

            return -1;

            error_propagate(errp, local_err);

            return;

        }

        s->blk_cur = s->blk;

    }
@@ -826,7 +826,6 @@ static int onenand_initfn(SysBusDevice *sbd) 
                     | ((s->id.dev & 0xff) << 8)

                     | (s->id.ver & 0xff),

                     &vmstate_onenand, s);

    return 0;

}



static Property onenand_properties[] = {
@@ -841,9 +840,8 @@ static Property onenand_properties[] = { 
static void onenand_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);



    k->init = onenand_initfn;

    dc->realize = onenand_realize;

    dc->reset = onenand_system_reset;

    dc->props = onenand_properties;

}

hw/char/grlib_apbuart.c

+5 −7
Original line number Diff line number Diff line
@@ -239,9 +239,10 @@ static const MemoryRegionOps grlib_apbuart_ops = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



static int grlib_apbuart_init(SysBusDevice *dev)

static void grlib_apbuart_realize(DeviceState *dev, Error **errp)

{

    UART *uart = GRLIB_APB_UART(dev);

    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);



    qemu_chr_fe_set_handlers(&uart->chr,

                             grlib_apbuart_can_receive,
@@ -249,14 +250,12 @@ static int grlib_apbuart_init(SysBusDevice *dev) 
                             grlib_apbuart_event,

                             NULL, uart, NULL, true);



    sysbus_init_irq(dev, &uart->irq);

    sysbus_init_irq(sbd, &uart->irq);



    memory_region_init_io(&uart->iomem, OBJECT(uart), &grlib_apbuart_ops, uart,

                          "uart", UART_REG_SIZE);



    sysbus_init_mmio(dev, &uart->iomem);



    return 0;

    sysbus_init_mmio(sbd, &uart->iomem);

}



static void grlib_apbuart_reset(DeviceState *d)
@@ -280,9 +279,8 @@ static Property grlib_apbuart_properties[] = { 
static void grlib_apbuart_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);



    k->init = grlib_apbuart_init;

    dc->realize = grlib_apbuart_realize;

    dc->reset = grlib_apbuart_reset;

    dc->props = grlib_apbuart_properties;

}