Commit 0f6a6d5d authored by Richard Henderson's avatar Richard Henderson Committed by David Gibson
Browse files

target/ppc: convert vsplt[bhw] to use vector operations 



Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Acked-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Message-Id: <20190215100058.20015-5-mark.cave-ayland@ilande.co.uk>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 471ff3d0

target/ppc/helper.h

+0 −3
Original line number Diff line number Diff line
@@ -246,9 +246,6 @@ DEF_HELPER_3(vrld, void, avr, avr, avr) 
DEF_HELPER_3(vsl, void, avr, avr, avr)

DEF_HELPER_3(vsr, void, avr, avr, avr)

DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32)

DEF_HELPER_3(vspltb, void, avr, avr, i32)

DEF_HELPER_3(vsplth, void, avr, avr, i32)

DEF_HELPER_3(vspltw, void, avr, avr, i32)

DEF_HELPER_3(vextractub, void, avr, avr, i32)

DEF_HELPER_3(vextractuh, void, avr, avr, i32)

DEF_HELPER_3(vextractuw, void, avr, avr, i32)

target/ppc/int_helper.c

+0 −19
Original line number Diff line number Diff line
@@ -1869,25 +1869,6 @@ void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) 
#endif

}



/* Experimental testing shows that hardware masks the immediate.  */

#define _SPLAT_MASKED(element) (splat & (ARRAY_SIZE(r->element) - 1))

#define SPLAT_ELEMENT(element) _SPLAT_MASKED(element)

#define VSPLT(suffix, element, access)                                  \

    void helper_vsplt##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \

    {                                                                   \

        uint32_t s = b->access(SPLAT_ELEMENT(element));                 \

        int i;                                                          \

                                                                        \

        for (i = 0; i < ARRAY_SIZE(r->element); i++) {                  \

            r->access(i) = s;                                           \

        }                                                               \

    }

VSPLT(b, u8, VsrB)

VSPLT(h, u16, VsrH)

VSPLT(w, u32, VsrW)

#undef VSPLT

#undef SPLAT_ELEMENT

#undef _SPLAT_MASKED

#if defined(HOST_WORDS_BIGENDIAN)

#define VINSERT(suffix, element)                                            \

    void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \

target/ppc/translate/vmx-impl.inc.c

+27 −19
Original line number Diff line number Diff line
@@ -798,24 +798,32 @@ GEN_VXFORM_NOA(vprtybw, 1, 24); 
GEN_VXFORM_NOA(vprtybd, 1, 24);

GEN_VXFORM_NOA(vprtybq, 1, 24);



#define GEN_VXFORM_UIMM(name, opc2, opc3)                               \

static void glue(gen_, name)(DisasContext *ctx)                                 \

    {                                                                   \

        TCGv_ptr rb, rd;                                                \

        TCGv_i32 uimm;                                                  \

        if (unlikely(!ctx->altivec_enabled)) {                          \

            gen_exception(ctx, POWERPC_EXCP_VPU);                       \

            return;                                                     \

        }                                                               \

        uimm = tcg_const_i32(UIMM5(ctx->opcode));                       \

        rb = gen_avr_ptr(rB(ctx->opcode));                              \

        rd = gen_avr_ptr(rD(ctx->opcode));                              \

        gen_helper_##name (rd, rb, uimm);                               \

        tcg_temp_free_i32(uimm);                                        \

        tcg_temp_free_ptr(rb);                                          \

        tcg_temp_free_ptr(rd);                                          \

static void gen_vsplt(DisasContext *ctx, int vece)

{

    int uimm, dofs, bofs;



    if (unlikely(!ctx->altivec_enabled)) {

        gen_exception(ctx, POWERPC_EXCP_VPU);

        return;

    }



    uimm = UIMM5(ctx->opcode);

    bofs = avr64_offset(rB(ctx->opcode), true);

    dofs = avr64_offset(rD(ctx->opcode), true);



    /* Experimental testing shows that hardware masks the immediate.  */

    bofs += (uimm << vece) & 15;

#ifndef HOST_WORDS_BIGENDIAN

    bofs ^= 15;

    bofs &= ~((1 << vece) - 1);

#endif



    tcg_gen_gvec_dup_mem(vece, dofs, bofs, 16, 16);

}



#define GEN_VXFORM_VSPLT(name, vece, opc2, opc3) \

static void glue(gen_, name)(DisasContext *ctx) { gen_vsplt(ctx, vece); }



#define GEN_VXFORM_UIMM_ENV(name, opc2, opc3)                           \

static void glue(gen_, name)(DisasContext *ctx)                         \

    {                                                                   \
@@ -858,9 +866,9 @@ static void glue(gen_, name)(DisasContext *ctx) \ 
        tcg_temp_free_ptr(rd);                                          \

    }



GEN_VXFORM_UIMM(vspltb, 6, 8);

GEN_VXFORM_UIMM(vsplth, 6, 9);

GEN_VXFORM_UIMM(vspltw, 6, 10);

GEN_VXFORM_VSPLT(vspltb, MO_8, 6, 8);

GEN_VXFORM_VSPLT(vsplth, MO_16, 6, 9);

GEN_VXFORM_VSPLT(vspltw, MO_32, 6, 10);

GEN_VXFORM_UIMM_SPLAT(vextractub, 6, 8, 15);

GEN_VXFORM_UIMM_SPLAT(vextractuh, 6, 9, 14);

GEN_VXFORM_UIMM_SPLAT(vextractuw, 6, 10, 12);