Commit 0e4b5869 authored by Alex Bennée's avatar Alex Bennée Committed by Peter Maydell
Browse files

target-arm: kvm64 sync FP register state 



For migration to work we need to sync all of the register state. This is
especially noticeable when GCC starts using FP registers as spill
registers even with integer programs.

Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 74fdb781

target-arm/kvm64.c

+82 −3
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 


#include <linux/kvm.h>



#include "config-host.h"

#include "qemu-common.h"

#include "qemu/timer.h"

#include "sysemu/sysemu.h"
@@ -126,9 +127,16 @@ bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx) 
#define AARCH64_CORE_REG(x)   (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \

                 KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))



#define AARCH64_SIMD_CORE_REG(x)   (KVM_REG_ARM64 | KVM_REG_SIZE_U128 | \

                 KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))



#define AARCH64_SIMD_CTRL_REG(x)   (KVM_REG_ARM64 | KVM_REG_SIZE_U32 | \

                 KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))



int kvm_arch_put_registers(CPUState *cs, int level)

{

    struct kvm_one_reg reg;

    uint32_t fpr;

    uint64_t val;

    int i;

    int ret;
@@ -207,15 +215,48 @@ int kvm_arch_put_registers(CPUState *cs, int level) 
        }

    }



    /* Advanced SIMD and FP registers

     * We map Qn = regs[2n+1]:regs[2n]

     */

    for (i = 0; i < 32; i++) {

        int rd = i << 1;

        uint64_t fp_val[2];

#ifdef HOST_WORDS_BIGENDIAN

        fp_val[0] = env->vfp.regs[rd + 1];

        fp_val[1] = env->vfp.regs[rd];

#else

        fp_val[1] = env->vfp.regs[rd + 1];

        fp_val[0] = env->vfp.regs[rd];

#endif

        reg.id = AARCH64_SIMD_CORE_REG(fp_regs.vregs[i]);

        reg.addr = (uintptr_t)(&fp_val);

        ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);

        if (ret) {

            return ret;

        }

    }



    reg.addr = (uintptr_t)(&fpr);

    fpr = vfp_get_fpsr(env);

    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpsr);

    ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);

    if (ret) {

        return ret;

    }



    fpr = vfp_get_fpcr(env);

    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpcr);

    ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);

    if (ret) {

        return ret;

    }



    if (!write_list_to_kvmstate(cpu)) {

        return EINVAL;

    }



    kvm_arm_sync_mpstate_to_kvm(cpu);



    /* TODO:

     * FP state

     */

    return ret;

}
@@ -223,6 +264,7 @@ int kvm_arch_get_registers(CPUState *cs) 
{

    struct kvm_one_reg reg;

    uint64_t val;

    uint32_t fpr;

    int i;

    int ret;
@@ -304,6 +346,43 @@ int kvm_arch_get_registers(CPUState *cs) 
        }

    }



    /* Advanced SIMD and FP registers

     * We map Qn = regs[2n+1]:regs[2n]

     */

    for (i = 0; i < 32; i++) {

        uint64_t fp_val[2];

        reg.id = AARCH64_SIMD_CORE_REG(fp_regs.vregs[i]);

        reg.addr = (uintptr_t)(&fp_val);

        ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);

        if (ret) {

            return ret;

        } else {

            int rd = i << 1;

#ifdef HOST_WORDS_BIGENDIAN

            env->vfp.regs[rd + 1] = fp_val[0];

            env->vfp.regs[rd] = fp_val[1];

#else

            env->vfp.regs[rd + 1] = fp_val[1];

            env->vfp.regs[rd] = fp_val[0];

#endif

        }

    }



    reg.addr = (uintptr_t)(&fpr);

    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpsr);

    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);

    if (ret) {

        return ret;

    }

    vfp_set_fpsr(env, fpr);



    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpcr);

    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);

    if (ret) {

        return ret;

    }

    vfp_set_fpcr(env, fpr);



    if (!write_kvmstate_to_list(cpu)) {

        return EINVAL;

    }