Commit 0e045f43 authored by Bastian Koppelmann's avatar Bastian Koppelmann
Browse files

target-tricore: add FRET instructions of the v1.6 ISA 



Signed-off-by: default avatarBastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
parent 9e14a7b2

target-tricore/translate.c

+19 −0
Original line number Diff line number Diff line
@@ -3287,6 +3287,20 @@ static void gen_fcall_save_ctx(DisasContext *ctx) 
    tcg_temp_free(temp);

}



static void gen_fret(DisasContext *ctx)

{

    TCGv temp = tcg_temp_new();



    tcg_gen_andi_tl(temp, cpu_gpr_a[11], ~0x1);

    tcg_gen_qemu_ld_tl(cpu_gpr_a[11], cpu_gpr_a[10], ctx->mem_idx, MO_LESL);

    tcg_gen_addi_tl(cpu_gpr_a[10], cpu_gpr_a[10], 4);

    tcg_gen_mov_tl(cpu_PC, temp);

    tcg_gen_exit_tb(0);

    ctx->bstate = BS_BRANCH;



    tcg_temp_free(temp);

}



static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1,

                               int r2 , int32_t constant , int32_t offset)

{
@@ -3869,6 +3883,8 @@ static void decode_sr_system(CPUTriCoreState *env, DisasContext *ctx) 
    case OPC2_16_SR_DEBUG:

        /* raise EXCP_DEBUG */

        break;

    case OPC2_16_SR_FRET:

        gen_fret(ctx);

    }

}
@@ -7842,6 +7858,9 @@ static void decode_sys_interrupts(CPUTriCoreState *env, DisasContext *ctx) 
    case OPC2_32_SYS_RET:

        gen_compute_branch(ctx, op2, 0, 0, 0, 0);

        break;

    case OPC2_32_SYS_FRET:

        gen_fret(ctx);

        break;

    case OPC2_32_SYS_RFE:

        gen_helper_rfe(cpu_env);

        tcg_gen_exit_tb(0);

target-tricore/tricore-opcodes.h

+2 −0
Original line number Diff line number Diff line
@@ -399,6 +399,7 @@ enum { 
    OPC2_16_SR_RET                                   = 0x09,

    OPC2_16_SR_RFE                                   = 0x08,

    OPC2_16_SR_DEBUG                                 = 0x0a,

    OPC2_16_SR_FRET                                  = 0x07,

};

/* OPCM_16_SR_ACCU                                   */

enum {
@@ -1438,4 +1439,5 @@ enum { 
    OPC2_32_SYS_TRAPSV                           = 0x15,

    OPC2_32_SYS_TRAPV                            = 0x14,

    OPC2_32_SYS_RESTORE                          = 0x0e,

    OPC2_32_SYS_FRET                             = 0x03,

};