Commit 0dc8874a authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20171114' into staging 



ppc patch queue for 2017-11-14

Another couple of fixes for qemu-2.11.

# gpg: Signature made Tue 14 Nov 2017 04:36:20 GMT
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.11-20171114:
  xics/kvm: synchonize state before 'info pic'
  target/ppc: correct htab shift for hash on radix

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 98956063 dcb556fc

hw/intc/xics.c

+11 −0
Original line number Diff line number Diff line
@@ -40,11 +40,17 @@ 


void icp_pic_print_info(ICPState *icp, Monitor *mon)

{

    ICPStateClass *icpc = ICP_GET_CLASS(icp);

    int cpu_index = icp->cs ? icp->cs->cpu_index : -1;



    if (!icp->output) {

        return;

    }



    if (icpc->synchronize_state) {

        icpc->synchronize_state(icp);

    }



    monitor_printf(mon, "CPU %d XIRR=%08x (%p) PP=%02x MFRR=%02x\n",

                   cpu_index, icp->xirr, icp->xirr_owner,

                   icp->pending_priority, icp->mfrr);
@@ -52,6 +58,7 @@ void icp_pic_print_info(ICPState *icp, Monitor *mon) 


void ics_pic_print_info(ICSState *ics, Monitor *mon)

{

    ICSStateClass *icsc = ICS_BASE_GET_CLASS(ics);

    uint32_t i;



    monitor_printf(mon, "ICS %4x..%4x %p\n",
@@ -61,6 +68,10 @@ void ics_pic_print_info(ICSState *ics, Monitor *mon) 
        return;

    }



    if (icsc->synchronize_state) {

        icsc->synchronize_state(ics);

    }



    for (i = 0; i < ics->nr_irqs; i++) {

        ICSIRQState *irq = ics->irqs + i;

hw/intc/xics_kvm.c

+19 −0
Original line number Diff line number Diff line
@@ -81,6 +81,18 @@ static void icp_get_kvm_state(ICPState *icp) 
        & KVM_REG_PPC_ICP_PPRI_MASK;

}



static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg)

{

    icp_get_kvm_state(arg.host_ptr);

}



static void icp_synchronize_state(ICPState *icp)

{

    if (icp->cs) {

        run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp));

    }

}



static int icp_set_kvm_state(ICPState *icp, int version_id)

{

    uint64_t state;
@@ -156,6 +168,7 @@ static void icp_kvm_class_init(ObjectClass *klass, void *data) 
    icpc->post_load = icp_set_kvm_state;

    icpc->realize = icp_kvm_realize;

    icpc->reset = icp_kvm_reset;

    icpc->synchronize_state = icp_synchronize_state;

}



static const TypeInfo icp_kvm_info = {
@@ -234,6 +247,11 @@ static void ics_get_kvm_state(ICSState *ics) 
    }

}



static void ics_synchronize_state(ICSState *ics)

{

    ics_get_kvm_state(ics);

}



static int ics_set_kvm_state(ICSState *ics, int version_id)

{

    uint64_t state;
@@ -347,6 +365,7 @@ static void ics_kvm_class_init(ObjectClass *klass, void *data) 
    icsc->realize = ics_kvm_realize;

    icsc->pre_save = ics_get_kvm_state;

    icsc->post_load = ics_set_kvm_state;

    icsc->synchronize_state = ics_synchronize_state;

}



static const TypeInfo ics_kvm_info = {

hw/ppc/spapr_hcall.c

+6 −7
Original line number Diff line number Diff line
@@ -1636,6 +1636,12 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu, 
    spapr->cas_legacy_guest_workaround = !spapr_ovec_test(ov1_guest,

                                                          OV1_PPC_3_00);

    if (!spapr->cas_reboot) {

        /* If ppc_spapr_reset() did not set up a HPT but one is necessary

         * (because the guest isn't going to use radix) then set it up here. */

        if ((spapr->patb_entry & PATBE1_GR) && !guest_radix) {

            /* legacy hash or new hash: */

            spapr_setup_hpt_and_vrma(spapr);

        }

        spapr->cas_reboot =

            (spapr_h_cas_compose_response(spapr, args[1], args[2],

                                          ov5_updates) != 0);
@@ -1644,13 +1650,6 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu, 


    if (spapr->cas_reboot) {

        qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);

    } else {

        /* If ppc_spapr_reset() did not set up a HPT but one is necessary

         * (because the guest isn't going to use radix) then set it up here. */

        if ((spapr->patb_entry & PATBE1_GR) && !guest_radix) {

            /* legacy hash or new hash: */

            spapr_setup_hpt_and_vrma(spapr);

        }

    }



    return H_SUCCESS;

include/hw/ppc/xics.h

+2 −0
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ struct ICPStateClass { 
    void (*pre_save)(ICPState *icp);

    int (*post_load)(ICPState *icp, int version_id);

    void (*reset)(ICPState *icp);

    void (*synchronize_state)(ICPState *icp);

};



struct ICPState {
@@ -119,6 +120,7 @@ struct ICSStateClass { 
    void (*reject)(ICSState *s, uint32_t irq);

    void (*resend)(ICSState *s);

    void (*eoi)(ICSState *s, uint32_t irq);

    void (*synchronize_state)(ICSState *s);

};



struct ICSState {